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Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 43rd annual Design Automation Conference table of contents
San Francisco, CA, USA
SESSION: Session 32: logic synthesis I table of contents
Pages: 510 - 515  
Year of Publication: 2006
ISBN:1-59593-381-6
Authors
Jin S. Zhang  Portland State University, Portland, OR
Alan Mishchenko  University of California at Berkeley, Berkeley, CA
Robert Brayton  University of California at Berkeley, Berkeley, CA
Malgorzata Chrzanowska-Jeske  Portland State University, Portland, OR
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-based method that makes uses of structural analysis, integrated simulation and Boolean satisfiability for fast and scalable detection of classical symmetries of completely-specified Boolean functions. This is in contrast to previous incomplete circuit-based methods and complete BDD-based methods. Experimental results demonstrate that the proposed method works for large Boolean functions, for which BDDs cannot be constructed.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Jin S. Zhang: colleagues
Alan Mishchenko: colleagues
Robert Brayton: colleagues
Malgorzata Chrzanowska-Jeske: colleagues