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How will the fabless model survive?
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 43rd annual Design Automation Conference table of contents
San Francisco, CA, USA
PANEL SESSION: Session 1: panel table of contents
Pages: 1 - 2  
Year of Publication: 2006
ISBN:1-59593-381-6
Authors
Thomas Hartung  X-FAB Semiconductor Foundries AG
Jim Kupec  eSilicon Corporation
Ana Hunter  Samsung Semiconductor Inc.
Brad Paulsen  TSMC NA
Felicia James  Cadence Design Systems
Nick Yu  Qualcomm
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

The fabless model was traditionally enabled through clean interfaces - both in technical and business terms - between foundries and fabless semiconductor companies. However, with advanced geometry and analog/mixed-signal process nodes, the technical challenges have been greatly magnified, so that successful semiconductor design requires intimate co-optimization of design and manufacturing, infringing upon those clean interfaces. The panel presents views to these challenges and specifically how companies are planning to address them.


Collaborative Colleagues:
Thomas Hartung: colleagues
Jim Kupec: colleagues
Ana Hunter: colleagues
Brad Paulsen: colleagues
Felicia James: colleagues
Nick Yu: colleagues