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ABSTRACT
The fabless model was traditionally enabled through clean interfaces - both in technical and business terms - between foundries and fabless semiconductor companies. However, with advanced geometry and analog/mixed-signal process nodes, the technical challenges have been greatly magnified, so that successful semiconductor design requires intimate co-optimization of design and manufacturing, infringing upon those clean interfaces. The panel presents views to these challenges and specifically how companies are planning to address them. Collaborative Colleagues:
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