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A global progressive register allocator
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Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation table of contents
Ottawa, Ontario, Canada
SESSION: Register allocation and instruction scheduling table of contents
Pages: 204 - 215  
Year of Publication: 2006
ISBN:1-59593-320-4
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Authors
David Ryan Koes  Carnegie Mellon University, Pittsburgh, PA
Seth Copen Goldstein  Carnegie Mellon University, Pittsburgh, PA
Sponsors
ACM: Association for Computing Machinery
SIGPLAN: ACM Special Interest Group on Programming Languages
Publisher
ACM  New York, NY, USA
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ABSTRACT

This paper describes a global progressive register allocator, a register allocator that uses an expressive model of the register allocation problem to quickly find a good allocation and then progressively find better allocations until a provably optimal solution is found or a preset time limit is reached. The key contributions of this paper are an expressive model of global register allocation based on multicommodity network flows that explicitly represents spill code optimization, register preferences, copy insertion, and constant rematerialization; two fast, but effective, heuristic allocators based on this model; and a more elaborate progressive allocator that uses Lagrangian relaxation to compute the optimality of its allocations. Our progressive allocator demonstrates code size improvements as large as 16.75% compared to a traditional graph allocator. On average, we observe an initial improvement of 3.47%, which increases progressively to 6.84% as more time is permitted for compilation.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
David Ryan Koes: colleagues
Seth Copen Goldstein: colleagues