Understanding retiming through maximum average-weight cycles

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Understanding retiming through maximum average-weight cycles

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ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the third annual ACM symposium on Parallel algorithms and architectures table of contents

Hilton Head, South Carolina, United States

Pages: 338 - 348

Year of Publication: 1991

ISBN:0-89791-438-4

Author

Marios C. Papaefthymiou

Laboratory for Computer Science, Massachusetts Institute of Technology, Cambridge, MA

Sponsors

SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 1, Downloads (12 Months): 12, Citation Count: 3

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references cited by index terms collaborative colleagues

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Thomas T. Cormen , Charles E. Leiserson , Ronald L. Rivest, Introduction to algorithms, MIT Press, Cambridge, MA, 1990
	2	Shimon Even , Ami Litman, On the capabilities of systolic systems (extended abstract), Proceedings of the third annual ACM symposium on Parallel algorithms and architectures, p.357-367, July 21-24, 1991, Hilton Head, South Carolina, United States [doi>10.1145/113379.113412]
	3	H. N. Gabow , R. E. Tarjan, Faster scaling algorithms for network problems, SIAM Journal on Computing, v.18 n.5, p.1013-1036, Oct. 1989 [doi>10.1137/0218069]
	4	R. Karp. A characterization of the minimum cycle mean in a digraph. Discrete Mathematics, 23:309-311, 1978.
	5	E. L. Lawler. Combinatorial Optimization, Networks and Matroids. Holt, Rinehart and Winston, New York, 1976.
	6	F. Thomson Leighton, Introduction to parallel algorithms and architectures: array, trees, hypercubes, Morgan Kaufmann Publishers Inc., San Francisco, CA, 1991
	7	Charles Eric Leiserson, Area-Efficient VLSI Computation, MIT Press, Cambridge, MA, 1997
	8	C. E. Leiserson, F. M. Rose, and J. B. Saxe. Optimizing synchronous circuitry by retiming. 3rd Caltech Conference on VLSI, 1983. R. Bryant, ed., pp. 87-116.
	9	C. E. Leiserson and J. B. Saxe. Optimizing synchronous systems. Journal of VLSI and Computer Systems, 1(1):41-67, 1983.
	10	C. E. Leiserson and J. B. Sa~e. Retiming synchronous circuitry. Algorithmica, 6(1), 1991. Also available as MIT/LCS/TM-372.
	11	j. B. Orlin and R. K. Ahuja. New scaling Mgorithms for the assignment and minimum cycle mean problem. Technical Report 2019- 88, MIT Sloan School of Management, 1988.
	12	M. C. Papaefthymiou, ON RETIMING SYNCHRONOUS CIRCUITRY AND MIXED-INTEGER OPTIMIZATION, Massachusetts Institute of Technology, Cambridge, MA, 1990

CITED BY 3

	Deshanand P. Singh , Stephen D. Brown, Integrated retiming and placement for field programmable gate arrays, Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays, February 24-26, 2002, Monterey, California, USA
	Greg Snider, Performance-constrained pipelining of software loops onto reconfigurable hardware, Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays, February 24-26, 2002, Monterey, California, USA
	Deshanand P. Singh , Stephen D. Brown, The case for registered routing switches in field programmable gate arrays, Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays, p.161-169, February 2001, Monterey, California, United States