ACM Home Page
Please provide us with feedback. Feedback
Hardware efficient architectures for eigenvalue computation
Full text PdfPdf (278 KB)
Source Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe: Proceedings table of contents
Munich, Germany
SESSION: Advanced reconfigurable architectures and applications table of contents
Pages: 953 - 958  
Year of Publication: 2006
ISBN:3-9810801-0-6
Authors
Yang Liu  Imperial College, London
Christos-Savvas Bouganis  Imperial College, London
Peter Y. K. Cheung  Imperial College, London
Philip H. W. Leong  Imperial College, London
Stephen J. Motley  Imperial College, London
Sponsors
: The EDA Consortium
EDAA : European Design and Automation Association
IEEE-CS\DATC : The IEEE Computer Society
Publisher
European Design and Automation Association  3001 Leuven, Belgium, Belgium
Bibliometrics
Downloads (6 Weeks): 3,   Downloads (12 Months): 23,   Citation Count: 0
Additional Information:

abstract   references   collaborative colleagues  

Tools and Actions: Review this Article  

ABSTRACT

Eigenvalue computation is essential in many fields of science and engineering. For high performance and real-time applications, this may need to be done in hardware. This paper focuses on the exploration of hardware architectures which compute eigenvalues of symmetric matrices. We propose to use the Approximate Jacobi Method for general case symmetric matrix eigenvalue problem. The paper illustrates that the proposed architecture is more efficient than previous architectures reported in the literature. Moreover, for the special case of 3 x 3 symmetric matrices, we propose to use an Algebraic Method. It is shown that the pipelined architecture based on the Algebraic Method has a significant advantage in terms of area.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
G. Farneback, "Fast and accurate motion estimation using orientation tensors and parametric motion models," ICPR Proceedings, vol. 1, pp. 135 -- 139, 2000.
 
2
R. P. Brent, F. T. Luk, and C. Van Loan, "Computation of the singular value decomposition using mesh-connected processors.," Journal of VLSI and Computer Systems, vol. 1, no. 3, pp. 242 -- 270, 1985.
 
3
M. Kim, K. Ichige, and H. Arai, "Design of Jacobi EVD processor based on CORDIC for DOA estimation with MUSIC algorithm," PIMRC Proceedings, vol. 1, pp. 120 -- 4, 2002.
 
4
A. Ahmedsaid, A. Amira, and A. Bouridane, "Improved SVD systolic array and implementation on FPGA," FPT Proceedings, pp. 35 -- 42, 2003.
 
5
 
6
Waerden and B. L. van der, Algebra. New York; London: Springer-Verlag, 1991. translated by Fred Blum and John R. Schulenberger. Vol.1.
 
7
G. H. Golub and C. F. Van Loan, Matrix computations. Baltimore; London: Johns Hopkins University Press, 3rd ed., 1996.
 
8
J.-M. Delosme, "CORDIC algorithms: theory and extensions," Proceedings of the SPIE - The International Society for Optical Engineering, vol. 1152, pp. 131 -- 45, 1989.
 
9
Collaborative Colleagues:
Yang Liu: colleagues
Christos-Savvas Bouganis: colleagues
Peter Y. K. Cheung: colleagues
Philip H. W. Leong: colleagues
Stephen J. Motley: colleagues