| Dynamic scratch-pad memory management for irregular array access patterns |
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Design, Automation, and Test in Europe
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Proceedings of the conference on Design, automation and test in Europe: Proceedings
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Munich, Germany
SESSION: Code and data layout optimisations for embedded software
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Pages: 931 - 936
Year of Publication: 2006
ISBN:3-9810801-0-6
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Authors
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G. Chen
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Pennsylvania State university, University Park, PA
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O. Ozturk
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Pennsylvania State university, University Park, PA
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M. Kandemir
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Pennsylvania State university, University Park, PA
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M. Karakoy
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Imperial College, London
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European Design and Automation Association
3001 Leuven, Belgium, Belgium
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| Bibliometrics |
Downloads (6 Weeks): 6, Downloads (12 Months): 45, Citation Count: 4
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ABSTRACT
There exist many embedded applications such as those executing on set-top boxes, wireless base stations, HDTV, and mobile handsets that are structured as nested loops and benefit significantly from a software managed memory. Prior work on scratchpad memories (SPMs) focused primarily on applications with regular data access patterns. Unfortunately, some embedded applications do not fit in this category and consequently conventional SPM management schemes will fail to produce the best results for them. In this work, we propose a novel compilation strategy for data SPMs for embedded applications that exhibit irregular data access patterns. Our scheme divides the task of optimization between compiler and runtime. The compiler processes each loop nest and insert code to collect information at runtime. Then, the code is modified in such a fashion that, depending on the collected information, it dynamically chooses to use or not to use the data SPM for a given set of accesses to irregular arrays. Our results indicate that this approach is very successful with the applications that have irregular patterns and improves their execution cycles by about 54% over a state-of-the-art SPM management technique and 23% over the conventional cache memories. Also, the additional code size overhead incurred by our approach is less than 5% for all the applications tested.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 4
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Doosan Cho , Ilya Issenin , Nikil Dutt , Jonghee W. Yoon , Yunheung Paek, Software controlled memory layout reorganization for irregular array access patterns, Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems, September 30-October 03, 2007, Salzburg, Austria
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