ACM Home Page
Please provide us with feedback. Feedback
Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications
Full text PdfPdf (361 KB)
Source Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe: Proceedings table of contents
Munich, Germany
SESSION: Techniques for architecture exploration and characterisation table of contents
Pages: 740 - 745  
Year of Publication: 2006
ISBN:3-9810801-0-6
Authors
Alexandros Bartzas  VLSI Design and Testing Center-Democritus Univ. Thrace, Xanthi, Greece
Stylianos Mamagkakis  VLSI Design and Testing Center-Democritus Univ. Thrace, Xanthi, Greece
Georgios Pouiklis  VLSI Design and Testing Center-Democritus Univ. Thrace, Xanthi, Greece
David Atienza  DACYA/UCM, Madrid, Spain & LSI/EPFL, Lausanne, Switzerland
Francky Catthoor  Katholieke Univ. Leuven, Belgium
Dimitrios Soudris  VLSI Design and Testing Center-Democritus Univ. Thrace, Xanthi, Greece
Antonios Thanailakis  VLSI Design and Testing Center-Democritus Univ. Thrace, Xanthi, Greece
Sponsors
: The EDA Consortium
EDAA : European Design and Automation Association
IEEE-CS\DATC : The IEEE Computer Society
Publisher
European Design and Automation Association  3001 Leuven, Belgium, Belgium
Bibliometrics
Downloads (6 Weeks): 3,   Downloads (12 Months): 14,   Citation Count: 1
Additional Information:

abstract   references   cited by   collaborative colleagues  

Tools and Actions: Review this Article  

ABSTRACT

Network applications are becoming increasingly popular in the embedded systems domain requiring high performance, which leads to high energy consumption. In networks is observed that due to their inherent dynamic nature the dynamic memory subsystem is a main contributor to the overall energy consumption and performance. This paper presents a new systematic methodology, generating performance-energy trade-offs by implementing Dynamic Data Types (DDTs), targeting network applications. The proposed methodology consists of: (i) the application-level DDT exploration, (ii) the network-level DDT exploration and (iii) the Pareto-level DDT exploration. The methodology, supported by an automated tool, offers the designer a set of optimal dynamic data type design solutions. The effectiveness of the proposed methodology is tested on four representative real-life case studies. By applying the second step, it is proved that energy savings up to 80% and performance improvement up to 22% (compared to the original implementations of the benchmarks) can be achieved. Additional energy and performance gains can be achieved and a wide range of possible trade-offs among our Pareto-optimal design choices are obtained, by applying the third step. We achieved up to 93% reduction in energy consumption and up to 48% increase in performance.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
 
2
 
3
E. G. Daylight and et. al. Memory-access-aware data structure transformations for embedded software with dynamic data accesses. IEEE Tran. on VLSI Systems, 12, 2004.
 
4
5
6
7
 
8
M. Leeman and et. al. Methodology for refinement and optimisation of dynamic memory management for embedded systems in multimedia applications. In Proc. of SiPS, 2003.
 
9
S. Mamagkakis and et. al. Design of energy efficient wireless networks using dynamic data type refinement methodology. In Proc. of WWIC, 2004.
 
10
 
11
NLANR. http://www.nlanr.net.
12
 
13
P. Plauger and et. al. The Standard Template Library. Prentice-Hall, 1998.
14
 
15
 
16
 
17
 
18

Collaborative Colleagues:
Alexandros Bartzas: colleagues
Stylianos Mamagkakis: colleagues
Georgios Pouiklis: colleagues
David Atienza: colleagues
Francky Catthoor: colleagues
Dimitrios Soudris: colleagues
Antonios Thanailakis: colleagues