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A practical method to estimate interconnect responses to variabilities
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Source Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe: Proceedings table of contents
Munich, Germany
SESSION: Interactive presentation table of contents
Pages: 545 - 546  
Year of Publication: 2006
ISBN:3-9810801-0-6
Author
Frank Liu  IBM Austin Research Lab, Austin, TX
Sponsors
: The EDA Consortium
EDAA : European Design and Automation Association
IEEE-CS\DATC : The IEEE Computer Society
Publisher
European Design and Automation Association  3001 Leuven, Belgium, Belgium
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ABSTRACT

Variabilities in metal interconnect structures can affect circuit timing performance or even cause function failure in VLSI designs. This paper proposes a method to estimate the difference between the nominal and perturbed circuit waveforms by calculating the moments in frequency-domain via efficient iterative method. The algorithm can be used to accurately reproduce the differential waveforms, or to provide efficient early estimates on the timing impact of the variabilities for RC networks.