ALAMO: an improved σ-space based methodology for modeling process parameter variations in analog circuits

ABSTRACT

This paper describes an original methodology for accurately modeling MOSFET process parameter variations. As compared to other process parameter variation modeling methods, the proposed methodology is capable of correctly modeling not only differences of process/model parameters, but also the process parameter variations for individual devices. This capability is very important for popular analog circuits like current biasing circuits, voltage reference circuits, and single-ended output amplifiers.

REFERENCES

• 1: G. Gielen and R. Rutenbar. Computer-aided design of analog and mixed-signal integrated circuits. Proceedings of IEEE, 88(12):154--166, 2000.
• 2: Simon J. Lovett, Marco Welten, Alan Mathewson, and Barry Mason. Optimizing MOS transistor mismatch. IEEE Journal of Solid-state Circuits, 33(1):147--150, 1998.
• 3: P. Vancorenland , G. Van der Plas , M. Steyaert , G. Gielen , W. Sansen, A layout-aware synthesis methodology for RF circuits, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
• 4: Hua Tang , Hui Zhang , Alex Doboli, Synthesis of continuous-time filters and analog to digital converters by integrated constraint transformation, floorplanning and routing, Proceedings of the 13th ACM Great Lakes symposium on VLSI, April 28-29, 2003, Washington, D. C., USA [doi>10.1145/764808.764861]
• 5: Gang Zhang , Aykut Dengi , Ronald A. Rohrer , Rob A. Rutenbar , L. Richard Carley, A synthesis flow toward fast parasitic closure for radio-frequency integrated circuits, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA [doi>10.1145/996566.996612]
• 6: Patrick Drennan and Colin McAndrew. Understanding MOSFET mismatch for analog design. IEEE Journal of Solid-State Circuits, 38(3):450--456, 2003.
• 7: Christopher Michael , Mohammed I. Ismail, Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits, Kluwer Academic Publishers, Norwell, MA, 1993
• 8: Marcel Pelgrom, C. J. Duinmaijer, and Anton WelBers. Matching properties of MOS transistors. IEEE Journal of Solid-state Circuits, 24(5):1433--1440, 1989.
• 9: Ta-Hsun Yeh, Jason Lin, Shyh-Chyi Wong, Honda Huang, and Jack Sun. Mis-match characterization of 1.8v and 3.3v devices in 0.18μm mixed signal CMOS technology. In Proc. IEEE Int. Conference on Microelectronic Test Structures, 2001.
• 10: J. Bastos, M. Steyaert, B. Graindourze, and W. Sanse. Matching of MOS transistors with different layout styles. In Proc. IEEE Int. Conference on Microelectronic Test Structures, 1996.
• 11: Kadaba R. Lakshmikumar, Robert A. Hadaway, and Miles A. Copeland. Characterization and modeling of mismatch in MOS transistors for precision analog design. IEEE Journal of Solid-State Cicuits, sc-21(6):1057--1066, 1986.
• 12: Umberto Gatti and Franco Maloberti. Analog VLSI Signal and Information Processing. McGraw-Hill Inc., 1994.
• 13: F. Schenkel, M. Pronath, H. Graeb, and K. Antreich. A fast method for identifying matching-relevant transistor pairs. In Proc. IEEE Custom Integrated Circuits Conference, 2001.
• 14: Adrian Leuciuc and Yi Zhang. A highly linear low-voltage mos transconducto. In Proc. IEEE Int. Symposium on Circuits and Systems, 2002.