| Time domain model order reduction by wavelet collocation method |
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Design, Automation, and Test in Europe
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Proceedings of the conference on Design, automation and test in Europe: Proceedings
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Munich, Germany
SESSION: Power grid and large interconnect network analysis
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Pages: 21 - 26
Year of Publication: 2006
ISBN:3-9810801-0-6
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Authors
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Xuanzeng
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Fudan University, Shanghai, China
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Lihong Feng
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Fudan University, Shanghai, China
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Yangfeng Su
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Fudan University, Shanghai, China
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Wei Cai
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University of North Carolina at Charlotte, Charlotte, NC
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Dian Zhou
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University of Texas at Dallas, Richardson, TX
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Charles Chiang
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Synopsys Inc., Mountain View, CA
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European Design and Automation Association
3001 Leuven, Belgium, Belgium
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Downloads (6 Weeks): 2, Downloads (12 Months): 15, Citation Count: 0
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ABSTRACT
In this paper, a wavelet based approach is proposed for the model order reduction of linear circuits in time domain. Compared with Chebyshev reduction method, the wavelet reduction approach can achieve smaller reduced order circuits with very high accuracy, especially for those circuits with strong singularities. Furthermore, to compute the basis function coefficient vectors, a fast Sylvester equation solver is proposed, which works more than one or two orders faster than the vector equation solver employed by Chebyshev reduction method. The proposed wavelet method is also compared with the frequency domain model reduction method, which may loose accuracy in time domain. Both theoretical analysis and experiment results have demonstrated the high speed and high accuracy of the proposed method.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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