A low-power and high-linear double-balanced switching mixer

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback
Take a look at the new version of this page: [ beta version ]. Tell us what you think.

A low-power and high-linear double-balanced switching mixer

Full text

Pdf (220 KB)

Source

Great Lakes Symposium on VLSI archive
Proceedings of the 16th ACM Great Lakes symposium on VLSI table of contents

Philadelphia, PA, USA

POSTER SESSION: Poster session 1 table of contents

Pages: 131 - 134

Year of Publication: 2006

ISBN:1-59593-347-6

Authors

Jun-Da Chen	National Changhua University of Education, Changhua, Taiwan
Zhi-Ming Lin	National Changhua University of Education, Changhua, Taiwan

Sponsors

ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 3, Downloads (12 Months): 55, Citation Count: 0

Additional Information:

abstract references index terms collaborative colleagues

Tools and Actions:	Request Permissions Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/1127908.1127941 What is a DOI?

ABSTRACT

The paper presents a novel topology mixer that leads to better performance in terms of linearity and power consumption for low supply voltage. Designed in umc 0.18μm CMOS technology, the mixer achieves: 4.55dB power conversion gain; 13.3dB noise figure; 4dBm input third-order intercept point (IIP3); and only 2mW of power consumption from a 1V supply voltage.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	T. W. Kim,B. Kim,and K. Lee, "Highly Linear Receiver Front-End Adopting MOSFET Transconductance Linearization by Multiple Gated Transistors," IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 223--229, Jan. 2004.
	2	S. G. Lee and J. K. Choi, "Current-reuse bleeding mixer," IEE Electronics Letters, vol. 36, no. 8, pp. 696--697, Apr. 2000.
	3	Hooman Darabi and Asad A. Abidi, "Noise in RF-CMOS Mixer: A Simple Physical Model," IEEE J. Solid-State Circuits, vol. 35, no. 1, pp. 15--25, Jan. 2000.
	4	P.J. Sullivan, B.A. Xavier, and W.H. Ku, "Low voltage performance of a microwave CMOS Gilbert cell mixer," IEEE J. Solid-State Circuits, vol. 32, no. 7, pp.1151--1155, July 1997.
	5	Hung-Che Wei, Ro-Min Weng, Chih-Lung Hsiao, and Kun-Yi Lin, "A 1.5 V 2.4 GHz CMOS Mixer with High Linearity," Proceedings of the IEEE Asia-Pacific Conference on Circuits and Systems, pp. 289--292, Dec. 2004.
	6	Eric A. M. Klumperink, Simon M. Louwsma, and Gerard J. M. Wienk, "A CMOS Switched Transconductor Mixer," IEEE J. Solid-State Circuits, vol. 39, no. 8, pp. 1231--1240, Aug. 2004.
	7	V. Vidojkovic, Johan Van Der Tang, Arjan Leeuwenburgh, and Arthur Van Roermund, "Mixer topology selection for a 1.8--2.5 GHz multistandard front-end in 0.18 μm CMOS," in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), vol. 2, 2003, pp. 300--303.
	8	V. Vidojkovic, Johan Van Der Tang, Arjan Leeuwenburgh, and Arthur Van Redmond, "Low Voltage, Low Power Folded-Switching Mixer With Current-Reuse in 0.18 μm CMOS," in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), vol. 1, 2004, pp. 569--572.
	9	V. Vidojkovic, Johan Van Der Tang, Arjan Leeuwenburgh, and Arthur Van Roermund, "A Low-Voltage Folded-Switching Mixer in 0.18-μm CMOS" IEEE J. Solid-State Circuits, vol. 40, no. 6, pp. 1259--1264, June 2005.
	10	Carsten Hermann and Marc Tiebout, "A 0.6 V 1.6 mW transformer based 2.5 GHz down-conversion mixer with 5.4 dB gain and -2.8 dBm IIP3 in 0.13 μm CMOS," IEEE Transactions On Microwave Theory and Techniques, vol. 53, no. 2, pp. 15--25, Feb. 2005.