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Interconnect estimation without packing via ACG floorplans
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Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 2005 Asia and South Pacific Design Automation Conference table of contents
Shanghai, China
SESSION: Poster session III table of contents
Pages: 1152 - 1155  
Year of Publication: 2005
ISBN:0-7803-8737-6
Authors
Jia Wang  Northwestern University, Evanston, IL
Hai Zhou  Northwestern University, Evanston, IL
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
: Shanghai IC Industry Association
: IEEE SSCS Shanghai Chapter
: IEEE CAS
: IEEE Beijing Section
: Fudan University
: Chinese Institute of Electronics
Publisher
ACM  New York, NY, USA
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ABSTRACT

ACG (Adjacent Constraint Graph) is a general floorplan representation. The refinement of constraint graphs gives not only an efficient representation but also a representation sharing the advantage of adjacency graphs. As most edges in an ACG are between modules that are close to each other, the physical distance of two modules can be measured without packing by the shortest path between them on the ACG. Experimental results verified this relationship and possible approaches for interconnect planning are discussed.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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