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Partial reluctance based circuit simulation is efficient and stable
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Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 2005 Asia and South Pacific Design Automation Conference table of contents
Shanghai, China
SESSION: Interconnect modeling and analysis and system level design methodology table of contents
Pages: 483 - 488  
Year of Publication: 2005
ISBN:0-7803-8737-6
Authors
Yu Du  School of Engineering, U.C. Santa Cruz, Santa Cruz, CA
Wayne Dai  School of Engineering, U.C. Santa Cruz, Santa Cruz, CA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
: Shanghai IC Industry Association
: IEEE SSCS Shanghai Chapter
: IEEE CAS
: IEEE Beijing Section
: Fudan University
: Chinese Institute of Electronics
Publisher
ACM  New York, NY, USA
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ABSTRACT

Partial reluctance K, the inversion of partial inductance L, is proposed by Devgan et al to capture the on-chip inductance effect [3]. Partial reluctance based circuit simulation is efficient and stable because it is believed that partial reluctance effect is local and partial reluctance matrix is positive definite, although it has not been proved or illustrated clearly. In this paper, we are going to prove that mutual partial reluctance effect between a completely shielded short conductor segment and a conductor segment outside the shield is zero, which implies that the partial reluctance effect is local. Also, an iterative cutting algorithm is proposed to guarantee the strong diagonal dominance of the partial reluctance matrix, which is a sufficient condition for the partial reluctance matrix to be positive definite. With these two characters of partial reluctance, the circuit simulation based on partial reluctance is efficient and stable.


REFERENCES

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Y. Du and W. Dai. Partial Reluctance K Based Circuit Analysis Is Stable. Technical Report ucsc-crl-03-09, University of California, Santa Cruz, December 2003.
 
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