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ABSTRACT
We present fast algorithms to synthesize exact minimal reversible circuits for various types of gates and costs. By reducing reversible logic synthesis problems to group theory problems, we use the powerful algebraic software GAP to solve such problems. Our algorithms are not only able to minimize for arbitrary cost functions of gates, but also orders of magnitude faster than the existing approaches to reversible logic synthesis. In addition, we show that the Peres gate is a better choice than the standard Toffoli gate in libraries of universal reversible gates.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 3
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Robert Wille , Hoang M. Le , Gerhard W. Dueck , Daniel Große, Quantified synthesis of reversible logic, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany
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