A flexible framework for communication evaluation in SoC design

ABSTRACT

We present SoCExplore, a framework for fast communication-centric design space exploration of complex SoCs with network-based interconnects. Speed-up in exploration is achieved through abstraction of computation as a high-level trace, and accuracy is maintained through cycle-accurate interconnect simulation. The flexibility offered allows for fast partition/mapping and interconnect design space exploration. Error analysis of such frameworks is non-trivial and is presented for the first time. As a case study, a speed-up of 94% over architectural simulation is reported for the MPEG application.

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