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Testing comparison faults of ternary CAMs based on comparison faults of binary CAMs
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Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 2005 Asia and South Pacific Design Automation Conference table of contents
Shanghai, China
SESSION: Test and DFT (1) table of contents
Pages: 65 - 70  
Year of Publication: 2005
ISBN:0-7803-8737-6
Author
Jin-Fu Li  National Central University, Jungli, Taiwan, R.O.C.
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
: Shanghai IC Industry Association
: IEEE SSCS Shanghai Chapter
: IEEE CAS
: IEEE Beijing Section
: Fudan University
: Chinese Institute of Electronics
Publisher
ACM  New York, NY, USA
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ABSTRACT

With the increasing demand for high-performance networking application, network components such as network interfaces and routers are built in dedicated hardware modulars. Content addressable memories (CAMs) play an important role in the network components. Testing CAMs is very complicated due to their special structure. This paper presents an efficient March-like test algorithm for detecting the comparison faults of ternary CAMs based on the comparison fault models of binary CAMs. The test algorithm requires 5N Write operations, 2N Erase operations, and (3N + 2B) Compare operations for an N x B-bit TCAM.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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