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Routing-aware scan chain ordering
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Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 2003 Asia and South Pacific Design Automation Conference table of contents
Kitakyushu, Japan
SESSION: DFT optimizations table of contents
Pages: 857 - 862  
Year of Publication: 2003
ISBN:0-7803-7660-9
Authors
Puneet Gupta  University of California at San Diego
Andrew B. Kahng  University of California at San Diego
Stefanus Mantik  Cadence Design Systems, Inc., San Jose, CA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
IPSJ : Information Processing Society of Japan
IEICE : Institute of Electronics, Information and Communication Engineers
: IEEE Circuits and Systems Society
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 3,   Downloads (12 Months): 13,   Citation Count: 3
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ABSTRACT

Scan chain insertion can have a large impact on routability, wirelength and timing of the design. We present a routing-driven methodology for scan chain ordering with minimum wirelength objective. A routing-based approach to scan chain ordering, while potentially more accurate, can result in TSP (Traveling Salesman Problem) instances which are asymmetric and highly non-metric; this may require a careful choice of solvers. We evaluate our new methodology on recent industry place-and-route blocks with 1200 to 5000 scan cells. We show substantial wirelength reductions for the routing-based flow, versus the traditional placement-based flow: in a number of our test cases, over 86% of scan routing overhead is saved. Even though our experiments are so far timing-oblivious, the routing-based flow does also improve evaluated timing, and practical timing-driven extensions appear feasible.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Puneet Gupta: colleagues
Andrew B. Kahng: colleagues
Stefanus Mantik: colleagues