| Memory access pattern analysis and stream cache design for multimedia applications |
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Asia and South Pacific Design Automation Conference
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Proceedings of the 2003 Asia and South Pacific Design Automation Conference
table of contents
Kitakyushu, Japan
SESSION: Bus encoding and memory optimization
table of contents
Pages: 22 - 27
Year of Publication: 2003
ISBN:0-7803-7660-9
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Authors
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Junghee Lee
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Seoul National University, Seoul, Korea
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Chanik Park
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Software Center, Samsung Electronics, Seoul, Korea
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Soonhoi Ha
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Seoul National University, Seoul, Korea
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Downloads (6 Weeks): 16, Downloads (12 Months): 45, Citation Count: 4
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ABSTRACT
Memory system is a major performance and power bottleneck in embedded systems especially for multimedia applications. Most multimedia applications access stream type of data structures with regular access patterns. It is observed that conventional caches behave poorly for stream-type data structure. Therefore, prediction-based prefetching techniques have been extensively researched to exploit the regular access patterns. Prefetching, however, may pollute the cache if the prediction is not accurate and needs extra hardware prediction logic. To overcome these problems, we propose a novel hardware prefetching technique that is assisted by static analysis of data access pattern with stream caches. With the proposed stream cache architecture, we could achieve significant performance improvement compared with the conventional cache architecture.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 4
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Ilya Issenin , Erik Brockmeyer , Bart Durinck , Nikil Dutt, Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
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