| Functional modeling techniques for efficient SW code generation of video codec applications |
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Asia and South Pacific Design Automation Conference
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Proceedings of the 2006 Asia and South Pacific Design Automation Conference
table of contents
Yokohama, Japan
SESSION: Modeling, compilation and optimization of embedded architectures
table of contents
Pages: 935 - 940
Year of Publication: 2006
ISBN:0-7803-9451-8
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IEEE Press
Piscataway, NJ, USA
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Downloads (6 Weeks): 3, Downloads (12 Months): 13, Citation Count: 1
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ABSTRACT
Architectures with multiple programmable cores are becoming more attractive for video codec applications because they can provide highly concurrent computation and support multiple video standards and a shorter time-to-market. To find an efficient SW code for the multiple core architecture for a video codec application, it is very important to easily explore the design space by generating a SW code automatically from its functional model.We introduce Abstract Clock Synchronous Model (ACSM) for functional modeling of video codec applications. The ACSM can easily represent both parallelism and conditionals, which are common in video codec applications. By applying ACSM to an H.264 baseline decoder on single core architecture, we reduced the execution time and the number of external memory accesses by 32% and 46% respectively compared to traditional dataflow model.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY
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Sang-Il Han , Xavier Guerin , Soo-Ik Chae , Ahmed A. Jerraya, Buffer memory optimization for video codec application modeled in Simulink, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA
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