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Analysis and optimization of gate leakage current of power gating circuits
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Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 2006 Asia and South Pacific Design Automation Conference table of contents
Yokohama, Japan
SESSION: Power optimization of large-scale circuits table of contents
Pages: 565 - 569  
Year of Publication: 2006
ISBN:0-7803-9451-8
Authors
Hyung-Ock Kim  Korea Advanced Institute of Science and Technology (KAIST), Daejeo, Korea
Youngsoo Shin  Korea Advanced Institute of Science and Technology (KAIST), Daejeo, Korea
Sponsors
: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society
IPSJ SIG-SLDM : Information Processing Society of Japan, SIG System LSI Design Methodology
Publisher
IEEE Press  Piscataway, NJ, USA
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Downloads (6 Weeks): 9,   Downloads (12 Months): 38,   Citation Count: 1
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ABSTRACT

Power gating is widely accepted as an efficient way to suppress subthreshold leakage current. Yet, it suffers from gate leakage current, which grows very fast with scaling down of gate oxide. We try to understand the sources of leakage current in power gating circuits and show that input MOSFETs play a crucial role in determining total gate leakage current. It is also shown that the choice of a current switch in terms of polarity, threshold voltage, and size has a significant impact on total leakage current. From the observation of the importance of input MOSFETs, we propose the power optimization of power gating circuits through input control.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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Collaborative Colleagues:
Hyung-Ock Kim: colleagues
Youngsoo Shin: colleagues