An unconditional stable general operator splitting method for transistor level transient analysis

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback
Take a look at the new version of this page: [ beta version ]. Tell us what you think.

An unconditional stable general operator splitting method for transistor level transient analysis

Full text

Pdf (2.51 MB)

Source

Asia and South Pacific Design Automation Conference archive
Proceedings of the 2006 Asia and South Pacific Design Automation Conference table of contents

Yokohama, Japan

SESSION: Advanced circuit simulation table of contents

Pages: 428 - 433

Year of Publication: 2006

ISBN:0-7803-9451-8

Authors

Zhengyong Zhu	University of California, San Diego, La Jolla, CA
Rui Shi	University of California, San Diego, La Jolla, CA
Chung-Kuan Cheng	University of California, San Diego, La Jolla, CA
Ernest S. Kuh	University of California, Berkeley, Berkeley, CA

Sponsors

: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society
IPSJ SIG-SLDM : Information Processing Society of Japan, SIG System LSI Design Methodology

Publisher

IEEE Press Piscataway, NJ, USA

Bibliometrics

Downloads (6 Weeks): 2, Downloads (12 Months): 21, Citation Count: 0

Additional Information:

abstract references index terms collaborative colleagues

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/1118299.1118403 What is a DOI?

ABSTRACT

In this paper, we introduce a general operator splitting method for transient simulation of VLSI circuits. The proposed approach generates special partitions of the circuits and alternates the explicit and implicit integrations between the partitions. We prove that the method is unconditionally stable independent of the step size. The splitting scheme greatly reduces the nonzero fill-ins generated in direct methods like LU decomposition. Orders of magnitude speedup over Berkeley SPICE3 is observed for sets of circuits.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	P. Feldmann , R. W. Freund, Reduced-order modeling of large linear subcircuits via a block Lanczos algorithm, Proceedings of the 32nd ACM/IEEE conference on Design automation, p.474-479, June 12-16, 1995, San Francisco, California, United States [doi>10.1145/217474.217573]
	2	Altan Odabasioglu , Mustafa Celik , Lawrence T. Pileggi, PRIMA: passive reduced-order interconnect macromodeling algorithm, Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design, p.58-65, November 09-13, 1997, San Jose, California, United States
	3	Zhengyong Zhu , Bo Yao , Chung-Kuan Cheng, Power network analysis using an adaptive algebraic multigrid approach, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA [doi>10.1145/775832.775862]
	4	Joseph N. Kozhaya , Sani R. Nassif , Farid N. Najm, Multigrid-like technique for power grid analysis, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
	5	Tsung-Hao Chen , Charlie Chung-Ping Chen, Efficient large-scale power grid analysis based on preconditioned krylov-subspace iterative methods, Proceedings of the 38th conference on Design automation, p.559-562, June 2001, Las Vegas, Nevada, United States [doi>10.1145/378239.379023]
	6	E. Acar, F. Dartu and L. T. Pileggi, "TETA: Transistor level Waveform Evaluation for Timing Analysis," IEEE Trans. on Computer-Aided Design, Vol. 21, No. 5, May 2002
	7	K. A. Sakallah and S. W. Director,"SAMSON2: An Event Driven VLSI Circuit Simulator," IEEE Trans. on Computer-Aided Design of ICs and Sytems, vol. 4(4), pp. 668--684, October 1985.
	8	www.nassda.com/hsim.html
	9	www.synopsys.com/products/mixedsignal/nanosim
	10	www.cadence.com/products/custom_ic/ultrasim/
	11	Zhao Li , C.-J. Richard Shi, SILCA: Fast-Yet-Accurate Time-Domain Simulation of VLSI Circuits with Strong Parasitic Coupling Effects, Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, p.793, November 09-13, 2003 [doi>10.1109/ICCAD.2003.123]
	12	E. L. Wachspress and G. J. Habetler, "An alternating-direction-implicit iteration technique," J. Soc. Ind. and Appl. Math. 8, 403--424(1960)
	13	F. Zheng, Z. Chen, J. Zhang, "Toward the development of a three-dimensional unconditionally stable finite-difference time-domain method," IEEE Tran. Microwave Theory and Techniques, vol 48, No. 9, Sep 2000
	14	Yu Min Lee , Charlie Chung Ping Chen, Power grid transient simulation in linear time based on transmission-line-modeling alternating-direction-implicit method, Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design, November 04-08, 2001, San Jose, California
	15	Yu-Min Lee , Charlie Chung-Ping Chen, The Power Grid Transient Simulation in Linear Time Based on 3D Alternating-Direction-Implicit Method, Proceedings of the conference on Design, Automation and Test in Europe, p.11020, March 03-07, 2003
	16	T. Namiki and K. Ito, "New FDTD algorithm free from the CFL condition restraint for a 2D-TE wave," IEEE Antennas Propagat. Symp. Dig., pp, 192--195, July 1999.
	17	W. F. Ames, "Numerical Methods for Partial Differential Equations," 2nd ed. New York Academic Press, 1977
	18	Wenquan Sui, Time-Domain Computer Analysis of Nonlinear Hybrid Systems, CRC Press, Inc., Boca Raton, FL, 2001
	19	W. H. Press, S. A. Teukolsky, W. T. Vetterling, "Numerical Recipe in C," 2nd ed. Cambridge University Press, 1992
	20	W. Guo and S. X.-D. Tan, "Circuit level alternating-direction-implicit approach to transient analysis of power distribution networks," Proc. 5th International Conference on ASIC, Oct.2003. pp.246--249.