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An automated design flow for 3D microarchitecture evaluation
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Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 2006 Asia and South Pacific Design Automation Conference table of contents
Yokohama, Japan
SESSION: Leading edge design methodology for SoCs and SiPs table of contents
Pages: 384 - 389  
Year of Publication: 2006
ISBN:0-7803-9451-8
Authors
Jason Cong  University of California, Los Angeles, California
Ashok Jagannathan  University of California, Los Angeles, California
Yuchun Ma  University of California, Los Angeles, California
Glenn Reinman  University of California, Los Angeles, California
Jie Wei  University of California, Los Angeles, California
Yan Zhang  University of California, Los Angeles, California
Sponsors
: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society
IPSJ SIG-SLDM : Information Processing Society of Japan, SIG System LSI Design Methodology
Publisher
IEEE Press  Piscataway, NJ, USA
Bibliometrics
Downloads (6 Weeks): 9,   Downloads (12 Months): 67,   Citation Count: 6
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ABSTRACT

Although the emerging three-dimensional integration technology can significantly reduce interconnect delay, chip area, and power dissipation in nanometer technologies, its impact on overall system performance is still poorly understood due to the lack of tools and systematic flows to evaluate 3D microarchitectural designs. The contribution of this paper is the development of MEVA-3D, an automated physical design and architecture performance estimation flow for 3D architectural evaluation which includes 3D floorplanning, routing, interconnect pipelining and automated thermal via insertion, and associated die size, performance, and thermal modeling capabilities. We apply this flow to a simple, out-of-order superscalar microprocessor to evaluate the performance and thermal behavior in 2D and 3D designs, and demonstrate the value of MEVA-3D in providing quantitative evaluation results to guide 3D architecture designs. In particular, we show that it is feasible to manage thermal challenges with a combination of thermal vias and double-sided heat sinks, and report modest system performance gains in 3D designs for these simple test examples.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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CITED BY  6

Collaborative Colleagues:
Jason Cong: colleagues
Ashok Jagannathan: colleagues
Yuchun Ma: colleagues
Glenn Reinman: colleagues
Jie Wei: colleagues
Yan Zhang: colleagues