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IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faults
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Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 2006 Asia and South Pacific Design Automation Conference table of contents
Yokohama, Japan
SESSION: Resolving timing issues: design and test table of contents
Pages: 366 - 371  
Year of Publication: 2006
ISBN:0-7803-9451-8
Authors
Katherine Shu-Min Li  National Chiao Tung University, Hsichu, Taiwan
Yao-Wen Chang  National Taiwan University, Taipei, Taiwan
Chauchin Su  National Chiao Tung University, Hsichu, Taiwan
Chung-Len Lee  National Chiao Tung University, Hsichu, Taiwan
Jwu E Chen  National Central University, Chungli, Taiwan
Sponsors
: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society
IPSJ SIG-SLDM : Information Processing Society of Japan, SIG System LSI Design Methodology
Publisher
IEEE Press  Piscataway, NJ, USA
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ABSTRACT

We propose an interconnect diagnosis scheme based on Oscillation Ring test methodology for SOC design with heterogeneous cores. The target fault models are delay faults and crosstalk glitches. We analyze the diagnosability of an interconnect structure and propose a fast diagnosability checking algorithm and an efficient diagnosis ring generation algorithm which achieves the optimal diagnosability. Two optimization techniques improve the efficiency and effectiveness of interconnect diagnosis. In all experiments, our method achieves 100% fault coverage and the optimal diagnosis resolution.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Katherine Shu-Min Li: colleagues
Yao-Wen Chang: colleagues
Chauchin Su: colleagues
Chung-Len Lee: colleagues
Jwu E Chen: colleagues