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Application-specific customization of soft processor microarchitecture
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Source International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays table of contents
Monterey, California, USA
SESSION: Application 3 table of contents
Pages: 201 - 210  
Year of Publication: 2006
ISBN:1-59593-292-5
Authors
Peter Yiannacouras  University of Toronto, Toronto, Canada
J. Gregory Steffan  University of Toronto, Toronto, Canada
Jonathan Rose  University of Toronto, Toronto, Canada
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 5,   Downloads (12 Months): 52,   Citation Count: 10
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ABSTRACT

A key advantage of soft processors (processors built on an FPGA programmable fabric) over hard processors is that they can be customized to suit an application program's specific software. This notion has been exploited in the past principally through the use of application-specific instructions. While commercial soft processors are now widely deployed, they are available in only a few microarchitectural variations. In this work we explore the advantage of tuning the processor's microarchitecture to specific software applications, and show that there are significant advantages in doing so.Using an infrastructure for automatically generating soft processors that span the area/speed design space (while remaining competitive with Altera's Nios II variations), we explore the impact of tuning several aspects of microarchitecture including: (i) hardware vs software multiplication support; (ii) shifter implementation; and (iii) pipeline depth, organization, and forwarding. We find that the processor design that is fastest overall (on average across our embedded benchmark applications) is often also the fastest design for an individual application. However, in terms of area efficiency (i.e., performance-per-area), we demonstrate that a tuned microarchitecture can offer up to 30% improvement for three of the benchmarks and on average 11.4% improvement over the fastest-on-average design. We also show that our benchmark applications use only 50% of the available instructions on average, and that a processor customized to support only that subset of the ISA for a specific application can on average offer 25% savings in both area and energy. Finally, when both techniques for customization are combined we obtain an average improvement in performance-per-area of 25%.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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CITED BY  10

Collaborative Colleagues:
Peter Yiannacouras: colleagues
J. Gregory Steffan: colleagues
Jonathan Rose: colleagues