| A 90nm low-power FPGA for battery-powered applications |
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International Symposium on Field Programmable Gate Arrays
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Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
table of contents
Monterey, California, USA
SESSION: Architecture 1
table of contents
Pages: 3 - 11
Year of Publication: 2006
ISBN:1-59593-292-5
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Authors
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Tim Tuan
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Xilinx Research Labs, San Jose, CA
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Sean Kao
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Xilinx Research Labs, San Jose, CA
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Arif Rahman
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Xilinx Research Labs, San Jose, CA
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Satyaki Das
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Xilinx Research Labs, San Jose, CA
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Steve Trimberger
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Xilinx Research Labs, San Jose, CA
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Downloads (6 Weeks): 24, Downloads (12 Months): 185, Citation Count: 8
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ABSTRACT
Programmable logic devices such as FPGAs are useful for a wide range of applications. However, FPGAs are not commonly used in battery-powered applications because they consume more power than ASICs and lack power management features. In this paper, we describe the design and implementation of Pika, a low-power FPGA core targeting battery-powered applications such as those in consumer and automotive markets. Our design uses the Xilinx Spartan-3 low-cost FPGA as a baseline and achieves substantial power savings through a series of power optimizations. The resulting architecture is compatible with existing commercial design tools. The implementation is done in a 90nm triple-oxide CMOS process. Compared to the baseline design, Pika consumes 46% less active power and 99% less standby power. Furthermore, it retains circuit and configuration state during standby mode, and wakes up from standby mode in approximately 100ns.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 8
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Takashi Kawanami , Masakazu Hioki , Yohei Matsumoto , Toshiyuki Tsutsumi , Tadashi Nakagawa , Toshihiro Sekigawa , Hanpei Koike, Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA, IEICE - Transactions on Information and Systems, v.E90-D n.12, p.1947-1955, December 2007
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David Lewis , Elias Ahmed , David Cashman , Tim Vanderhoek , Chris Lane , Andy Lee , Philip Pan, Architectural enhancements in Stratix-III™ and Stratix-IV™, Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays, February 22-24, 2009, Monterey, California, USA
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