| Robust analog/RF circuit design with projection-based posynomial modeling |
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International Conference on Computer Aided Design
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Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
table of contents
Pages: 855 - 862
Year of Publication: 2004
ISBN:0-7803-8702-3
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Authors
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Xin Li
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Dept. of Electr. & Comput. Eng.,, Carnegie Mellon Univ., Pittsburgh, PA, USA
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P. Gopalakrishnan
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Dept. of Electr. & Comput. Eng.,, Carnegie Mellon Univ., Pittsburgh, PA, USA
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Yang Xu
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Dept. of Electr. & Comput. Eng.,, Carnegie Mellon Univ., Pittsburgh, PA, USA
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T. Pileggi
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Dept. of Electr. & Comput. Eng.,, Carnegie Mellon Univ., Pittsburgh, PA, USA
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IEEE Computer Society
Washington, DC, USA
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| Bibliometrics |
Downloads (6 Weeks): 4, Downloads (12 Months): 18, Citation Count: 11
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ABSTRACT
We propose a robust analog design tool (ROAD) for post-tuning analog/RF circuits. Starting from an initial design derived from hand analysis or analog circuit synthesis based on simplified models, ROAD extracts accurate posynomial performance models via transistor-level simulation and optimizes the circuit by geometric programming. Importantly, ROAD sets up all design constraints to include large-scale process variations to facilitate the tradeoff between yield and performance. A novel convex formulation of the robust design problem is utilized to improve the optimization efficiency and to produce a solution that is superior to other local tuning methods. In addition, a novel projection-based approach for posynomial fitting is used to facilitate scaling to large problem sizes. A new implicit power iteration algorithm is proposed to find the optimal projection space and extract the posynomial coefficients with robust convergence. The efficacy of ROAD is demonstrated on several circuit examples.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 11
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Xin Li , Jian Wang , L. T. Pileggi , Tun-Shih Chen , Wanju Chiang, Performance-centering optimization for system-level analog design exploration, Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design, p.422-429, November 06-10, 2005, San Jose, CA
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