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DynamoSim: a trace-based dynamically compiled instruction set simulator
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Source International Conference on Computer Aided Design archive
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design table of contents
Pages: 131 - 136  
Year of Publication: 2004
ISBN:0-7803-8702-3
Authors
Wai Sum Mong  Dept. of Electrical and Computer Engineering, University of Toronto, Toronto, Ontario, CA
Jianwen Zhu  Dept. of Electrical and Computer Engineering, University of Toronto, Toronto, Ontario, CA
Publisher
IEEE Computer Society  Washington, DC, USA
Bibliometrics
Downloads (6 Weeks): 2,   Downloads (12 Months): 23,   Citation Count: 7
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abstract   references   cited by   collaborative colleagues  

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DOI Bookmark: 10.1109/ICCAD.2004.1382557

ABSTRACT

Instruction set simulators are indispensable tools for the architectural exploration and verification of embedded systems. Different techniques have recently been proposed to speed up the simulation over the classical interpretation-based simulators, while maintaining their flexibility. We introduce a suite of techniques inspired by recent advances in dynamic compilers to construct a hybrid simulation framework. Compared with compiled simulators reported earlier, our framework is more flexible, since any instruction can be interpreted; and faster, since only frequently executed instructions are translated on-the-fly into native code for direct execution, and the scope of our translation is extended from basic blocks to traces, and sophisticated register allocation is performed. Comprehensive results on SPEC2000 benchmarks are reported for the standard SimpleScalar processor to demonstrate the efficiency of proposed techniques.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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[20] W.F. Kao and I. J. Huang, "Instruction retargeting based on the state pair notation," in Asia Pacific Conference on Hardware Description Languages, 1997, pp. 114-120.
 
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[27] Robert F. Cmelik and D. Keppel, "Shade: A fast instruction-set simulator for execution profiling," Tech. Rep. SMLI 93-12, UWCSE 93-06-06, University of Washington, 1993.

CITED BY  7
Collaborative Colleagues:
Wai Sum Mong: colleagues
Jianwen Zhu: colleagues