| Parallel program behavioral study on a shared-memory multiprocessor |
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International Conference on Supercomputing
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Proceedings of the 5th international conference on Supercomputing
table of contents
Cologne, West Germany
Pages: 386 - 395
Year of Publication: 1991
ISBN:0-89791-434-1
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Authors
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Hock-Beng Lim
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Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign, 305 Talbot Laboratory, 104 S. Wright, Urbana, IL
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Pen-Chung Yew
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Center for Supercomputing Research and Development, University of Illinois at Urbana-Champaign, 305 Talbot Laboratory, 104 S. Wright, Urbana, IL
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Downloads (6 Weeks): 8, Downloads (12 Months): 12, Citation Count: 1
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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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N. Cabbibo and E. Marinari, "A New Method of Updating SU(n) Matrices in Computer Simulations of Gauge Theories," Physics Letters, llgB, 1982.
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T. Gottschalk, "A New Multi-Target Tracking Model," Proc. of the Third Conf. on Hypereube Concurrent Computers and Apphcations, 1987.
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H.-B. Lira and'P.-C. Yew, "Parallel Program Behavioral Study on a Shared-Memory Multiprocessor," Tech. Report 1062, Center for Supercomputing Research and Development, UIUC, Dec 1990.
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Anita Borg , R. E. Kessler , David W. Wall, Generation and analysis of very long address traces, Proceedings of the 17th annual international symposium on Computer Architecture, p.270-279, May 28-31, 1990, Seattle, Washington, United States
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D. Lilja and P.-C. Yew, "Compiler-Assisted Directory-Based Cache Coherence Scheme," Tech. Report 990, Center for Supercomputing Research and Development~ UIUC, Nov 1990.
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A. Gupta, W.-D. Weber, and T. Mowry, "Reducing Memory and Traffic Requirements for Scalable Directory-Based Cache Coherence Schemes," Proc. of the 1990 Int. Conf. on Parallel Processing, Vol /, pp. 312-321, Aug. 1990.
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D. Lilja, D. Marcovitz, and P.-C. Yew, "Memory Referencing Behavior and Cache Performance in a Shared Memory Multiprocessor," Tech. Report 836, Center for Supercomputing Research and Development, UIUC, June 1989.
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