| Automatic network generation for system-on-chip communication design |
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International Conference on Hardware Software Codesign
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Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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Jersey City, NJ, USA
SESSION: On-chip communication and interface design
table of contents
Pages: 255 - 260
Year of Publication: 2005
ISBN:1-59593-161-9
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Downloads (6 Weeks): 3, Downloads (12 Months): 24, Citation Count: 1
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ABSTRACT
With growing system complexities, system-level communication design is becoming increasingly important and advanced, network-oriented communication architectures become necessary. In this paper, we extend previous work on automatic communication refinement to support non-traditional, network-oriented architectures beyond a single bus. From an abstract description of the desired communication channels, the refinement tools automatically generate executable models and implementations of the system communication at various levels of abstraction. Experimental results show that significant productivity gains can be achieved, demonstrating the effectiveness of the approach for rapid, early communication design space exploration.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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