| An integer linear programming approach for identifying instruction-set extensions |
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International Conference on Hardware Software Codesign
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Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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Jersey City, NJ, USA
SESSION: Accelerating applications through customized instruction sets
table of contents
Pages: 172 - 177
Year of Publication: 2005
ISBN:1-59593-161-9
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Downloads (6 Weeks): 5, Downloads (12 Months): 54, Citation Count: 10
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ABSTRACT
This paper presents an Integer Linear Programming (ILP) approach to the instruction-set extension identification problem. An algorithm that iteratively generates and solves a set of ILP problems in order to generate a set of templates is proposed. A selection algorithm that ranks the generated templates based on isomorphism testing and potential evaluation is described. A Trimaran based framework is used to evaluate the quality of the instructions generated by the technique. Speed-up results of up to 7.5 are observed.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Cesare Alippi , William Fornaciari , Laura Pozzi , Mariagiovanna Sami, A DAG-based design approach for reconfigurable VLIW processors, Proceedings of the conference on Design, automation and test in Europe, p.57-es, January 1999, Munich, Germany
[doi> 10.1145/307418.307504]
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Jason Cong , Yiping Fan , Guoling Han , Zhiru Zhang, Application-specific instruction generation for configurable processor architectures, Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays, February 22-24, 2004, Monterey, California, USA
[doi> 10.1145/968280.968307]
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R. Niemann, P. Marwedel. An Algorithm for Hardware/Software Partitioning Using Mixed Integer Linear Programming. Design Automation for Embedded Systems, Vol. 2, No. 2, pages 165--193, Mar. 1997
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Nauty Package. http://cs.anu.edu.au/people/bdm/nauty.
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Trimaran: An Infrastructure for Research in Instruction Level Parallelism. http://www.trimaran.org.
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ILOG CPLEX :High-Performance Software for Mathematical Programming and Optimization. http://www.ilog.com/products/cplex/
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R. Zimmermann. Computer Arithmetic: Principles, Architectures, and VLSI Design, Lecture notes, Integrated Systems Laboratory, ETH Zürich, 1997
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CITED BY 10
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Carlo Galuzzi , Elena Moscu Panainte , Yana Yankova , Koen Bertels , Stamatis Vassiliadis, Automatic selection of application-specific instruction-set extensions, Proceedings of the 4th international conference on Hardware/software codesign and system synthesis, October 22-25, 2006, Seoul, Korea
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R. Leupers , K. Karuri , S. Kraemer , M. Pandey, A design flow for configurable embedded processors based on optimized instruction set extension synthesis, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
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Kubilay Atasu , Robert G. Dimond , Oskar Mencer , Wayne Luk , Can Özturan , Günhan Dündar, Optimizing instruction-set extensible processors under data bandwidth constraints, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
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Ajay K. Verma , Philip Brisk , Paolo Ienne, Fast, quasi-optimal, and pipelined instruction-set extensions, Proceedings of the 2008 conference on Asia and South Pacific design automation, January 21-24, 2008, Seoul, Korea
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Theo Kluter , Philip Brisk , Paolo Ienne , Edoardo Charbon, Speculative DMA for architecturally visible storage in instruction set extensions, Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, October 19-24, 2008, Atlanta, GA, USA
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I-Wei Wu , Zhi-Yuan Chen , Jyh-Jiun Shann , Chung-Ping Chung, Instruction set extension exploration in multiple-issue architecture, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany
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