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Design and optimization on dynamic power system for self-powered integrated wireless sensing nodes
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Source International Symposium on Low Power Electronics and Design archive
Proceedings of the 2005 international symposium on Low power electronics and design table of contents
San Diego, CA, USA
POSTER SESSION: Power supply design table of contents
Pages: 303 - 306  
Year of Publication: 2005
ISBN:1-59593-137-6
Authors
Dongsheng Ma  The University of Arizona, Tucson, AZ
Janet M. Wang  The University of Arizona, Tucson, AZ
Mohankumar N. Somasundaram  The University of Arizona, Tucson, AZ
Zongqi Hu  The University of Arizona, Tucson, AZ
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

This paper presents an integrated power system for low-power wireless sensor networks with dynamic efficiency optimization technique. By adaptively resizing power transistors and adjusting switching frequency, system efficiency is enhanced significantly. Theoretical analysis is elaborated to support the proposed technique. A prototype integrated power system for self-powered photovoltaic wireless sensing node was designed and simulated with TSMC 0.35μm CMOS process. With a power range of 0.5μW to 10mW, power efficiency stays above 71%. Tolerance between theoretical and simulated optimal power transistor sizes is less than 6.7%, while that of optimal switching frequencies is less than 5%. The paper gives another solution to minimizing system power in the perspective of power processing


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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J. F. Randall, "On the use of photovoltaic ambient energy sources for powering indoor electronic devices", Ph. D Thesis at EPFL, April 2003.
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T. D. Burd, T. A. Pering, A. J. Stratakos, R. W. Broderson, "A dynamic voltage scaled microprocessor system", IEEE J. of Solid State Ckts, Nov. 2000, 1571--1580.
 
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G-Y Wei, et. al., "A variable-frequency parallel I/O interface with adaptive power-supply regulation", IEEE J. of Solid State Circuits, Vol. 35, No. 11, Nov. 2000.
 
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D. Ma, et. al., "An integrated one-cycle control buck converter with adaptive output and dual loops for output error correction", IEEE J. of Solid-State Circuits, Jan. 2004, 140--149.
 
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P. Favrat, P. Deval and M. J. Declercq, "A high efficiency CMOS voltage doubler", IEEE Journal of Solid State Circuits, Vol. 33, No. 3, March 1998, 410--416.


Collaborative Colleagues:
Dongsheng Ma: colleagues
Janet M. Wang: colleagues
Mohankumar N. Somasundaram: colleagues
Zongqi Hu: colleagues