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Adaptive execution techniques for SMT multiprocessor architectures
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Source Principles and Practice of Parallel Programming archive
Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming table of contents
Chicago, IL, USA
SESSION: Architecture and systems table of contents
Pages: 236 - 246  
Year of Publication: 2005
ISBN:1-59593-080-9
Authors
Changhee Jung  Electronics and Telecommunications Research Institute, Daejeon, Korea
Daeseob Lim  University of California, San Diego, La Jolla, CA
Jaejin Lee  Seoul National University, Seoul, Korea
SangYong Han  Seoul National University, Seoul, Korea
Sponsors
SIGPLAN: ACM Special Interest Group on Programming Languages
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

In simultaneous multithreading (SMT) multiprocessors, using all the available threads (logical processors) to run a parallel loop is not always beneficial due to the interference between threads and parallel execution overhead. To maximize performance in an SMT multiprocessor, finding the optimal number of threads is important. This paper presents adaptive execution techniques to find the optimal execution mode for SMT multiprocessor architectures. A compiler preprocessor generates code that, based on dynamic feedback, automatically determines at run time the optimal number of threads for each parallel loop in the application. Using 10 standard numerical applications and running them with our techniques on an Intel 4-processor Hyper-Threading Xeon SMP with 8 logical processors, our code is, on average, about 2 and 18 times faster than the original code executed on 4 and 8 logical processors, respectively.


REFERENCES

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Collaborative Colleagues:
Changhee Jung: colleagues
Daeseob Lim: colleagues
Jaejin Lee: colleagues
SangYong Han: colleagues