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Reuse-distance-based miss-rate prediction on a per instruction basis
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Source Memory System Performance archive
Proceedings of the 2004 workshop on Memory system performance table of contents
Washington, D.C.
SESSION: Session III: analysis and language support table of contents
Pages: 60 - 68  
Year of Publication: 2004
ISBN:1-58113-941-1
Authors
Changpeng Fang  Michigan Technological University, Houghton MI
Steve Carr  Michigan Technological University, Houghton MI
Soner Önder  Michigan Technological University, Houghton MI
Zhenlin Wang  Michigan Technological University, Houghton MI
Sponsor
SIGPLAN: ACM Special Interest Group on Programming Languages
Publisher
ACM  New York, NY, USA
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ABSTRACT

Feedback-directed optimization has become an increasingly important tool in designing and building optimizing compilers. Recently, reuse-distance analysis has shown much promise in predicting the memory behavior of programs over a wide range of data sizes. Reuse-distance analysis predicts program locality by experimentally determining locality properties as a function of the data size of a program, allowing accurate locality analysis when the program's data size changes.Prior work has established the effectiveness of reuse distance analysis in predicting whole-program locality and miss rates. In this paper, we show that reuse distance can also effectively predict locality and miss rates on a per instruction basis. Rather than predict locality by analyzing reuse distances for memory addresses alone, we relate those addresses to particular static memory operations and predict the locality of each instruction.Our experiments show that using reuse distance without cache simulation to predict miss rates of instructions is superior to using cache simulations on a single representative data set to predict miss rates on various data sizes. In addition, our analysis allows us to identify the critical memory operations that are likely to produce a significant number of cache misses for a given data size. With this information, compilers can target cache optimization specifically to the instructions that can benefit from such optimizations most.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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R. L. Mattson, J. Gecsei, D. Slutz, and I. L. Traiger. Evaluation techniques for storage hierarchies. IBM Systems Journal, 9(2):78--117, 1970.
 
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Collaborative Colleagues:
Changpeng Fang: colleagues
Steve Carr: colleagues
Soner Önder: colleagues
Zhenlin Wang: colleagues