ACM Home Page
Please provide us with feedback. Feedback
Piece-wise approximations of RLCK circuit responses using moment matching
Full text PdfPdf (789 KB)
Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 42nd annual Design Automation Conference table of contents
Anaheim, California, USA
SESSION: Reduced-order modeling table of contents
Pages: 927 - 932  
Year of Publication: 2005
ISBN:1-59593-058-2
Authors
Chirayu S. Amin  Northwestern University, Evanston, IL
Yehea I. Ismail  Northwestern University, Evanston, IL
Florentin Dartu  Intel Corporation, Hillsboro, OR
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 3,   Downloads (12 Months): 15,   Citation Count: 0
Additional Information:

abstract   references   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/1065579.1065822
What is a DOI?

ABSTRACT

Capturing RLCK circuit responses accurately with existing model order reduction (MOR) techniques is very expensive. Direct metrics for fast analysis of RC circuits exist but there is no such technique for RLCK circuits. This paper introduces a new family of MOR techniques based on piece-wise functions to capture RLCK circuit responses accurately using only four or five moments. The time-domain response is approximated using a piece-wise function whose pieces are simple polynomials. The proposed method is fast and guaranteed stable and it avoids the calculation of poles and residues associated with existing model order reduction techniques. Results for many different industrial netlists indicate that delay and transition time can be captured within 5% error using only four moments. To the authors' knowledge, there is no existing method that can extract as much information about RLCK circuits with only four or five moments.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
L. T. Pillage and R. A. Rohrer, "Asymptotic waveform evaluation for timing analysis," TCAD, vol. 9, no. 4, pp. 352--366, April 1990.
 
2
P. Feldmann and R. W. Freund, "Efficient linear circuit analysis by Pade approximation via Lanczos process," TCAD, vol. 14, no. 5, pp. 639--649, May 1995.
 
3
A. Odabasioglu, M. Celik, L. T. Pileggi, "PRIMA: Passive Reduced-Order Interconnect Macromodeling Algorithm," TCAD, vol. 17, no. 8, pp. 645--654, August 1998.
 
4
International Technology Roadmap for Semiconductors (ITRS), 2003 edition, Semiconductor Industry Association (http://public.itrs.net/).
 
5
 
6
W. C. Elmore, "The transient response of damped linear networks with particular regard to wideband amplifiers," Journal of Applied Physics, v. 19, pp. 55--63, January 1948.
 
7
J. L. Wyatt, Circuit Analysis, Simulation and Design, North-Holland, The Netherlands: Elsevier Science, 1987.
8
9
10
11
 
12
13
14
15
16
 
17
M. Celik, L. Pileggi, A. Odabasioglu, IC Interconnect Analysis, Kluwer Academic Publications, Boston, 2002.

Collaborative Colleagues:
Chirayu S. Amin: colleagues
Yehea I. Ismail: colleagues
Florentin Dartu: colleagues