| Fine-grained application source code profiling for ASIP design |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 42nd annual Design Automation Conference
table of contents
Anaheim, California, USA
SESSION: Application specific architecture design tools
table of contents
Pages: 329 - 334
Year of Publication: 2005
ISBN:1-59593-058-2
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Downloads (6 Weeks): 17, Downloads (12 Months): 78, Citation Count: 11
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ABSTRACT
Current Application Specific Instruction set Processor (ASIP) design methodologies are mostly based on iterative architecture exploration that uses Architecture Description Languages (ADLs) and retargetable software development tools. However, for improved design efficiency, additional pre-architecture exploration tools are required to help narrow-down the huge design space and making coarsegrained Instruction Set Architecture (ISA) decisions before detailed ADL modeling. Extensive application code profiling is the key in such early design stages. Based on a novel code instrumentation technology, we present a microprofiling approach that fills the current gap between source-level and instruction-level profilers and combines their advantages w.r.t. speed and accuracy. We show how the microprofiler is embedded into an advanced ASIP design flow and justify its use in a case study to design an MP3 decoder ASIP.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 11
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R. Leupers , K. Karuri , S. Kraemer , M. Pandey, A design flow for configurable embedded processors based on optimized instruction set extension synthesis, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
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Torsten Kempf , Kingshuk Karuri , Stefan Wallentowitz , Gerd Ascheid , Rainer Leupers , Heinrich Meyr, A SW performance estimation framework for early system-level-design using fine-grained instrumentation, Proceedings of the conference on Design, automation and test in Europe: Proceedings, March 06-10, 2006, Munich, Germany
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Christophe Dubach , John Cavazos , Björn Franke , Grigori Fursin , Michael F.P. O'Boyle , Olivier Temam, Fast compiler optimisation evaluation using code-feature based performance prediction, Proceedings of the 4th international conference on Computing frontiers, May 07-09, 2007, Ischia, Italy
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A. Chattopadhyay , W. Ahmed , K. Karuri , D. Kammler , R. Leupers , G. Ascheid , H. Meyr, Design space exploration of partially re-configurable embedded processors, Proceedings of the conference on Design, automation and test in Europe, April 16-20, 2007, Nice, France
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Hanno Scharwaechter , Jonghee M. Youn , Rainer Leupers , Yunheung Paek , Gerd Ascheid , Heinrich Meyr, A code-generator generator for multi-output instructions, Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis, September 30-October 03, 2007, Salzburg, Austria
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Lei Gao , Stefan Kraemer , Rainer Leupers , Gerd Ascheid , Heinrich Meyr, A fast and generic hybrid simulation approach using C virtual machine, Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems, September 30-October 03, 2007, Salzburg, Austria
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Stefan Kraemer , Lei Gao , Jan Weinstock , Rainer Leupers , Gerd Ascheid , Heinrich Meyr, HySim: a fast simulation framework for embedded software development, Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis, September 30-October 03, 2007, Salzburg, Austria
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Matthias Krause , Dominik Englert , Oliver Bringmann , Wolfgang Rosenstiel, Combination of instruction set simulation and abstract RTOS model execution for fast and accurate target software evaluation, Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, October 19-24, 2008, Atlanta, GA, USA
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Lei Gao , Kingshuk Karuri , Stefan Kraemer , Rainer Leupers , Gerd Ascheid , Heinrich Meyr, Multiprocessor performance estimation using hybrid simulation, Proceedings of the 45th annual conference on Design automation, June 08-13, 2008, Anaheim, California
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Kingshuk Karuri , Anupam Chattopadhyay , Xiaolin Chen , David Kammler , Ling Hao , Rainer Leupers , Heinrich Meyr , Gerd Ascheid, A design flow for architecture exploration and implementation of partially reconfigurable processors, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.16 n.10, p.1281-1294, October 2008
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