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ABSTRACT
We present applications of a recently developed automated nonlinear macromodelling approach to the important problem of macromodelling high-speed output buffers/drivers. Good nonlinear macromodels of such drivers are essential for fast signal-integrity and timing analysis in high-speed digital design. Unlike traditional black-box modelling techniques, our approach extracts nonlinear macromodels of digital drivers automatically from SPICE-level descriptions. Thus it can naturally capture transistor-level nonlinearities in the macromodels, resulting in far more accurate signal integrity analysis, while retaining significant speedups. We demonstrate the technique by automatically extracting macromodels for two typical digital drivers. Using the macromodel, we obtain about 8x speedup in average with excellent accuracy in capturing different loading effects, crosstalk, simultaneous switching noise (SSN), etc.
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Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 4
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Noel Menezes , Chandramouli Kashyap , Chirayu Amin, A "true" electrical cell model for timing, noise, and power grid verification, Proceedings of the 45th annual conference on Design automation, June 08-13, 2008, Anaheim, California
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