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SEU tolerant device, circuit and processor design
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 42nd annual Design Automation Conference table of contents
Anaheim, California, USA
SESSION: Error-tolerant design table of contents
Pages: 5 - 10  
Year of Publication: 2005
ISBN:1-59593-058-2
Author
William Heidergott  General Dynamics, Scottsdale, Arizona
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 13,   Downloads (12 Months): 58,   Citation Count: 1
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ABSTRACT

Development of highly reliable and available systems requires consideration of the occurrence of single event upsets, the effects they have on system performance, and strategies for their prevention and mitigation. Methods of systems engineering process and the application and validation of techniques for fault tolerance are discussed as elements in the elimination and mitigation of single event upsets.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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