| Fast, efficient, recovering, and irreversible |
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Conference On Computing Frontiers
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Proceedings of the 2nd conference on Computing frontiers
table of contents
Ischia, Italy
SESSION: Part 3: adiabatic and energy-recovery circuits
table of contents
Pages: 407 - 413
Year of Publication: 2005
ISBN:1-59593-019-1
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Authors
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Visvesh Sathe
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University of Michigan, Ann Arbor, MI
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Juang-Ying Chueh
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University of Michigan, Ann Arbor, MI
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Joohee Kim
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University of Michigan, Ann Arbor, MI
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Conrad H. Ziesler
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MultiGig, Inc., Scotts Valley, CA
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Suhwan Kim
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Seoul National University, Seoul, Korea
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Marios C. Papaefthymiou
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University of Michigan, Ann Arbor, MI
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Downloads (6 Weeks): 11, Downloads (12 Months): 61, Citation Count: 0
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ABSTRACT
Recent advances in CMOS VLSI design have taken us to real working chips that rely on controlled charge recovery to operate at sub-stantially lower power dissipation levels than their conventional counterparts. In this paper, we present two such chips that were designed in our research group and highlight some of the promising charge-recovery techniques in practice. Although their origins can be traced back to the early adiabatic circuits, these techniques approach energy recycling from a more practical angle, shedding reversibility to achieve operating frequencies in excess of 1GHz with relatively low overheads
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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