ACM Home Page
Please provide us with feedback. Feedback
Power and performance optimization at the system level
Full text PdfPdf (337 KB)
Source Conference On Computing Frontiers archive
Proceedings of the 2nd conference on Computing frontiers table of contents
Ischia, Italy
Pages: 125 - 132  
Year of Publication: 2005
ISBN:1-59593-019-1
Authors
Valentina Salapura  IBM T.J. Watson Research Center
Randy Bickford  IBM T.J. Watson Research Center
Matthias Blumrich  IBM T.J. Watson Research Center
Arthur A. Bright  IBM T.J. Watson Research Center
Dong Chen  IBM T.J. Watson Research Center
Paul Coteus  IBM T.J. Watson Research Center
Alan Gara  IBM T.J. Watson Research Center
Mark Giampapa  IBM T.J. Watson Research Center
Michael Gschwind  IBM T.J. Watson Research Center
Manish Gupta  IBM T.J. Watson Research Center
Shawn Hall  IBM T.J. Watson Research Center
Ruud A. Haring  IBM T.J. Watson Research Center
Philip Heidelberger  IBM T.J. Watson Research Center
Dirk Hoenicke  IBM T.J. Watson Research Center
Gerard V. Kopcsay  IBM T.J. Watson Research Center
Martin Ohmacht  IBM T.J. Watson Research Center
Rick A. Rand  IBM T.J. Watson Research Center
Todd Takken  IBM T.J. Watson Research Center
Pavlos Vranas  IBM T.J. Watson Research Center
Sponsor
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 13,   Downloads (12 Months): 56,   Citation Count: 5
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/1062261.1062262
What is a DOI?

ABSTRACT

The BlueGene/L supercomputer has been designed with a focus on power/performance efficiency to achieve high application performance under the thermal constraints of common data centers. To achieve this goal, emphasis was put on system solutions to engineer a power-efficient system. To exploit thread level parallelism, the BlueGene/L system can scale to 64 racks with a total of 65536 computer nodes consisting of a single compute ASIC integrating all system functions with two industry-standard PowerPC microprocessor cores in a chip multiprocessor configuration. Each PowerPC processor exploits data-level parallelism with a high-performance SIMD oating point unitTo support good application scaling on such a massive system, special emphasis was put on efficient communication primitives by including five highly optimized communification networks. After an initial introduction of the Blue-Gene/L system architecture, we analyze power/performance efficiency for the BlueGene system using performance and power characteristics for the overall system performance (as exemplified by peak performance numbers.To understand application scaling behavior, and its impact on performance and power/performance efficiency, we analyze the NAMD molecular dynamics package using the ApoA1 benchmark. We find that even for strong scaling problems, BlueGene/L systems can deliver superior performance scaling and deliver significant power/performance efficiency. Application benchmark power/performance scaling for the voltage-invariant energy delay 2 power/performance metric demonstrates that choosing a power-efficient 700MHz embedded PowerPC processor core and relying on application parallelism was the right decision to build a powerful, and power/performance efficient system


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
G. Almasi, C. Cascaval, J. Castanos, D. Lieber, and J. Moreira. Developing system software for Blue Gene. Technical report, IBM TJ Watson Research Center, 2001.
 
2
P. Bose, D. Brooks, P. Emma, M. Gschwind, V. Srinivasan, P. Strenski, and V. Zyuban. Integrated analysis of power and performance for pipelined microprocessors. IBM Research Report RC22913, IBM TJ Watson Research Center, Yorktown Heights, NY, April 2003.
 
3
A. Bright, M. Ellavsky, A. Gara, R. Haring, G. Kopcsay, R. Lembach, J. Marcella, M. Ohmacht, and V. Salapura. Creating the BlueGene/L supercomputer from low power SoC ASICs. In Internationcal Solid State Circuits Conference. IEEE, February 2005.
 
4
A. Gara et al. An overview of the BlueGene/L system architecture. IBM Journal of Research and Development, 49(2), 2005.
 
5
M. Giampapa, R. Bellofatto, M. Blumrich, D. Chen, A. Gara, P. Heidelberger, D. Hoenicke, G. Kopcsay, B. Nathanson, B. Steinmacher-Burow, M. Ohmacht, V. Salapura, and P. Vranas. BlueGene/L advanced diagnostics environment. IBM Journal of Research and Development, 49(2), 2005.
 
6
R. Gonzalez, B. Gordon, and M. Horowitz. Supply and threshold voltage scaling for low power CMOS. IEEE Journal of Solid State Circuits, 2(8):1210--1216, August 1997.
 
7
R. Gonzalez and M. Horowitz. Energy dissipation in general purpose microprocessors. IEEE Journal of Solid State Circuits, 31(9):12771284, September 1996.
 
8
 
9
 
10
11

CITED BY  5

Collaborative Colleagues:
Valentina Salapura: colleagues
Randy Bickford: colleagues
Matthias Blumrich: colleagues
Arthur A. Bright: colleagues
Dong Chen: colleagues
Paul Coteus: colleagues
Alan Gara: colleagues
Mark Giampapa: colleagues
Michael Gschwind: colleagues
Manish Gupta: colleagues
Shawn Hall: colleagues
Ruud A. Haring: colleagues
Philip Heidelberger: colleagues
Dirk Hoenicke: colleagues
Gerard V. Kopcsay: colleagues
Martin Ohmacht: colleagues
Rick A. Rand: colleagues
Todd Takken: colleagues
Pavlos Vranas: colleagues