ACM Home Page
Please provide us with feedback. Feedback
Moment-driven coupling-aware routing methodology
Full text PdfPdf (139 KB)
Source Great Lakes Symposium on VLSI archive
Proceedings of the 15th ACM Great Lakes symposium on VLSI table of contents
Chicago, Illinois, USA
POSTER SESSION: Poster session 2 table of contents
Pages: 390 - 395  
Year of Publication: 2005
ISBN:1-59593-057-4
Authors
Amitava Bhaduri  University of Cincinnati, Cincinnati, OH
Ranga Vemuri  University of Cincinnati, Cincinnati, OH
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 0,   Downloads (12 Months): 11,   Citation Count: 0
Additional Information:

abstract   references   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/1057661.1057754
What is a DOI?

ABSTRACT

An underdamped signal response with a number of overshoots and undershoots may lead to false switching and increased settling time delay. This 'ringing' effect adversely affects the signal quality at the output and becomes a source of major concern at multi-GHz frequencies, as the self and mutual inductance of interconnects start playing a crucial role in the performance of a circuit. Reduction in wire length or minimization of coupling capacitance, the stronghold in many earlier routing techniques, may produce a routing solution suitable only at sub-GHz frequencies. In this paper, we propose a routing methodology that accounts for inductive and capacitive parasitics (self and mutual) of the interconnects in its cost function through a combination of second and third order central moments. A trade-off between signal delay and amount of ringing, quantified by second and third order central moments respectively, has been made, which generates a routing solution with the best compromise between ringing and delay for each net under a monotone signal response.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
R. Kastner, E. Bozorgzadeh and M. Sarrafzadeh. Coupling Aware Routing. In International ASIC/SOC Conference, pages 392--396, 2000.
 
2
 
3
4
5
 
6
7
 
8
S. Hur, A. Jagannathan and J. Lillis. Timing-Driven Maze Routing. In Tran. on Computer-Aided Design of Integrated Circuits and Systems, pages 234--241, 2000.
 
9
J. Hu and S. Sapatnekar. A Timing-Constrained Simultaneous Global Routing Algorithm. In Tran. on Computer-Aided Design of Integrated Circuits and Systems, pages 1025--1036, 2002.
 
10
J. Cong, C. Koh and P. Maddden. Interconnect Layout Optimization Under Higher Order RLC Model for MCM Designs. In Tran. on Computer-Aided Design of Integrated Circuits and Systems, pages 1455--1463, 2001.
 
11
R. Gupta, B. Krauter, L. T. Pileggi. Transmission Line Synthesis via Constrained Multivariable Optimization. In Tran. on Computer-Aided Design of Integrated Circuits and Systems, pages 6--19, 1997.
 
12
C. K. Cheng, J. Lillis, S. Lin and N. Chang. Interconnect Analysis and Synthesis. John Wiley & Sons, Inc, 2000.
 
13
H. B. Bakoglu. Circuits, Interconnections, and Packaging for VLSI. Addison-Wesley, 1990.
 
14
 
15
X. Qi et al. On-Chip Inductance Modeling and RLC Extraction of VLSI Interconnects for Circuit Simulation. In Custom Integrated Circuits Conference, pages 487--490, 2000.
16
 
17
M. Borah et al. An edge-based heuristic for Steiner routing. In Tran. on Computer-Aided Design of Integrated Circuits and Systems, pages 1563--1568, 1994.

Collaborative Colleagues:
Amitava Bhaduri: colleagues
Ranga Vemuri: colleagues