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Design of a cell library for asynchronous microengines
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Source Great Lakes Symposium on VLSI archive
Proceedings of the 15th ACM Great Lakes symposium on VLSI table of contents
Chicago, Illinois, USA
POSTER SESSION: Poster session 2 table of contents
Pages: 385 - 389  
Year of Publication: 2005
ISBN:1-59593-057-4
Authors
Gaurav Gulati  University of Utah, Salt Lake City, Utah
Erik Brunvand  University of Utah, Salt Lake City, Utah
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

Asynchronous microengines are an attractive alternative to globally synchronous systems for the realization of high performance programmable controllers. However, because of the specific demands of asynchronous signaling, it is not always easy to use existing standard cell libraries to implement asynchronous microengines. In this paper we present the design and evaluation of a CMOS cell set that augments a generic cell library with cells specific to the design of asynchronous microengines. These cells encapsulate behavior and timing information critical to the implementation of asynchronous microengine controllers. These special purpose cells result in higher performance circuits, and in a significant reduction in design time over a generic library. To validate the library, the control path of a popular asynchronous controller benchmark has been designed and fabricated through MOSIS.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Hans M. Jacobson and Ganesh Gopalakrishnan. Application-specific programmable control for high-performance asynchronous circuits. Proceedings of the IEEE, 87(2):319--331, February 1999. Corrections in Proc IEEE March 1999, p. 525.
 
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Niti Madan and Erik Brunvand. A case for asynchronous microengines for network processing. In Advanced Networking and Communications Hardware Workshop (ANCHOR 2004), June 2004.
 
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Himanshu Singh. Signal processing with asynchronous microengines. Master's thesis, Department of Electrical and Computer Engineering, University of Utah, December 2004.
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Ivan E. Sutherland and Jo Ebergen. Computers without clocks. Scientific American, 287(2), August 2002.
 
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Gaurav Gulati. A 32x64 self-timed sram core. Technical report, School of Computing, University of Utah, July 2003.
 
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Kenneth Y. Yun and David L. Dill. Automatic synthesis of extended burst-mode circuits: Part I (specification and hazard-free implementation). IEEE Transactions on Computer-Aided Design, 18(2):101--117, February 1999.
 
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Collaborative Colleagues:
Gaurav Gulati: colleagues
Erik Brunvand: colleagues