ACM Home Page
Please provide us with feedback. Feedback
Generating decision regions in analog measurement spaces
Full text PdfPdf (376 KB)
Source Great Lakes Symposium on VLSI archive
Proceedings of the 15th ACM Great Lakes symposium on VLSI table of contents
Chicago, Illinois, USA
POSTER SESSION: Poster session 1 table of contents
Pages: 88 - 91  
Year of Publication: 2005
ISBN:1-59593-057-4
Authors
Haralampos-G. D. Stratigopoulos  Yale University, New Haven, CT
Yiorgos Makris  Yale University, New Haven, CT
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 0,   Downloads (12 Months): 5,   Citation Count: 0
Additional Information:

abstract   references   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/1057661.1057684
What is a DOI?

ABSTRACT

We develop a neural network that learns to separate the nominal from the faulty instances of a circuit in a measurement space. We demonstrate that the required separation boundaries are, in general, non-linear. Unlike previous solutions which draw hyperplanes, our network is capable of drawing the necessary non-linear hypersurfaces. The hypersurfaces translate to test criteria that are strongly correlated to functional tests. A feature selection algorithm interacts with the network to identify a discriminative low-dimensional measurement space.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
 
2
S. I. Gallant. Perceptron-based learning algorithms. IEEE Transactions on Neural Networks, 1(2):179--191, 1990.
 
3
 
4
W. M. Lindermeir, H. E. Graeb, and K. J. Antreich. Analog testing by characteristic observation inference. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 18(9):1353--1368, 1999.
 
5
C. Y. Pan and K. T. Cheng. Test generation for linear time-invariant analog circuits. IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, 46(5):554--564, 1999.
 
6
 
7
P. N. Variyam, S. Cherubal, and A. Chatterjee. Prediction of analog performance parameters using fast transient testing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 21(3):349--361, 2002.

Collaborative Colleagues:
Haralampos-G. D. Stratigopoulos: colleagues
Yiorgos Makris: colleagues