| Prediction model for evaluation of reconfigurable interconnects in distributed shared-memory systems |
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International Workshop on System-Level Interconnect Prediction
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Proceedings of the 2005 international workshop on System level interconnect prediction
table of contents
San Francisco, California, USA
SESSION: Interconnect prediction
table of contents
Pages: 51 - 58
Year of Publication: 2005
ISBN:1-59593-033-7
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Authors
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W. Heirman
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Ghent University, Ghent, Belgium
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J. Dambre
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Ghent University, Ghent, Belgium
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C. Debaes
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Ghent University, Ghent, Belgium
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H. Thienpont
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Free University of Brussels, Brussels, Belgium
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D. Stroobandt
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Free University of Brussels, Brussels, Belgium
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J. Van Campenhout
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Ghent University, Ghent, Belgium
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Downloads (6 Weeks): 1, Downloads (12 Months): 18, Citation Count: 2
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ABSTRACT
Reconfigurable interconnection networks for distributed shared memory machines exploit properties of the workload dynamics that are not easily captured by statistical traffic models. Therefore, when designing such a network, one should make trade-offs based on full-system simulation for all viable workloads. It is however very time-consuming to do such simulations. In this paper, we present a technique that can predict the performance of a machine for different network parameters, based on the results of only one full simulation run. We also define confidence intervals for our prediction, and analyze the impact of several assumptions that were made.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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CITED BY 3
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W. Heirman , J. Dambre , I. Artundo , C. Debaes , H. Thienpont , D. Stroobandt , J. Van Campenhout, Predicting reconfigurable interconnect performance in distributed shared-memory systems, Integration, the VLSI Journal, v.40 n.4, p.382-393, July, 2007
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