|
||||||||||||||||||||||||
|
||||||||||||||||||||||||
ABSTRACT
Modern network applications require devices that provide high-performance at gigabit line rates with the flexibility to support diverse application standards and services. However, prohibitive product design costs and shrinking market windows restrict the number of ASIC/ASSP design starts to only selective application niches. The FPGA is an alternate cost-effective medium for many applications. However, creating a system solution through programming an FPGA with an HDL is only attractive to few application developers. Designers would prefer a software solution if it can meet their design constraints. An alterative is an FPGA-based soft multiprocessor system: a programmable multiprocessor on the FPGA composed of a network of hard and soft processing cores. Soft multiprocessors provide a software-level abstraction for programming an FPGA. In this study, we evaluate the feasibility and effectiveness of soft multiprocessor systems. We compare a soft multiprocessor implementation against FPGA hardware and an ASSP implementation for two network applications: IPv4 packet forwarding and Network Address Translation (NAT). Our study indicates that soft multiprocessors lose only a factor of 2X in performance compared to a custom ASSP, while providing great savings in terms of silicon development costs. Moreover, the presence of architectures and development environments for soft multiprocessor systems could open the FPGA market to the much larger world of embedded system software designers. Collaborative Colleagues:
|
||||||||||||||||||||||||