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Soft multiprocessor systems for network applications (abstract only)
Source International Symposium on Field Programmable Gate Arrays archive
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays table of contents
Monterey, California, USA
POSTER SESSION: FPGA architectures and circuits table of contents
Pages: 271 - 271  
Year of Publication: 2005
ISBN:1-59593-029-9
Authors
Yujia Jin  UC Berkeley, Berkeley, CA
William Plishker  UC Berkeley, Berkeley, CA
Kaushik Ravindran  UC Berkeley, Berkeley, CA
Nadathur Satish  UC Berkeley, Berkeley, CA
Kurt Keutzer  UC Berkeley, Berkeley, CA
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

Modern network applications require devices that provide high-performance at gigabit line rates with the flexibility to support diverse application standards and services. However, prohibitive product design costs and shrinking market windows restrict the number of ASIC/ASSP design starts to only selective application niches. The FPGA is an alternate cost-effective medium for many applications. However, creating a system solution through programming an FPGA with an HDL is only attractive to few application developers. Designers would prefer a software solution if it can meet their design constraints. An alterative is an FPGA-based soft multiprocessor system: a programmable multiprocessor on the FPGA composed of a network of hard and soft processing cores. Soft multiprocessors provide a software-level abstraction for programming an FPGA. In this study, we evaluate the feasibility and effectiveness of soft multiprocessor systems. We compare a soft multiprocessor implementation against FPGA hardware and an ASSP implementation for two network applications: IPv4 packet forwarding and Network Address Translation (NAT). Our study indicates that soft multiprocessors lose only a factor of 2X in performance compared to a custom ASSP, while providing great savings in terms of silicon development costs. Moreover, the presence of architectures and development environments for soft multiprocessor systems could open the FPGA market to the much larger world of embedded system software designers.

Collaborative Colleagues:
Yujia Jin: colleagues
William Plishker: colleagues
Kaushik Ravindran: colleagues
Nadathur Satish: colleagues
Kurt Keutzer: colleagues