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Compiler based exploration of DSP energy savings by SIMD operations
Full text Publisher SitePublisher Site PdfPdf (309 KB)
Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 2004 Asia and South Pacific Design Automation Conference table of contents
Yokohama, Japan
SESSION: Embedded system architectures table of contents
Pages: 838 - 841  
Year of Publication: 2004
ISBN:0-7803-8175-0
Authors
Markus Lorenz  University of Dortmund, Dortmund, Germany
Peter Marwedel  University of Dortmund, Dortmund, Germany
Thorsten Dräger  Technische Universität Dresden, Dresden, Germany
Gerhard Fettweis  Technische Universität Dresden, Dresden, Germany
Rainer Leupers  Aachen University of Technology, Aachen, Germany
Sponsors
IEICE : Institute of Electronics, Information and Communication Engineers
: IEEE Circuits and Systems Society
IPSJ : Information Processing Society of Japan
SIGDA: ACM Special Interest Group on Design Automation
Publisher
IEEE Press  Piscataway, NJ, USA
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Downloads (6 Weeks): 2,   Downloads (12 Months): 22,   Citation Count: 2
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ABSTRACT

The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the irregular DSP architectures for reducing chip size and energy consumption, single instruction multiple data (SIMD) functionality is frequently integrated with the intention of performance improvement. In order to get an energy-efficient system consisting of processor and compiler, it is necessary to optimize hardware as well as software. It is not obvious that SIMD operations can save any energy: if n operations are executed in parallel, each of them might consume the same amount of energy as if there were executed sequentially. Up to now, no work has been done to investigate the influence of compiler generated code containing SIMD operations w.r.t. the energy consumption. This paper deals with the exploration of the energy saving potential of SIMD operations for a DSP by using a generic compilation framework including an integrated instruction level energy cost model for our target architecture. Effects of SIMD operations on the energy consumption are shown for several benchmarks and an MP3 application 1.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
J. M. Rabaey and M. Pedram, editors. Low Power Design Methodologies Kluwer Academic Publishers, 1996.
 
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P. Op de Beeck, C. Ghez, E. Brockmeyer, M. Miranda, F. Catthoor, and G. Deconinck. Low-Power Implementation of an OFDM Based Channel Receiver in Real-Time Using a Low-End Media Processor. In Proc. of Workshop on Wireless Communications and Networking (WCN), 2002.
 
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G. Fettweis, M. Weiss, W. Drescher, U. Walther, F. Engel, and S. Kobayashi. Breaking new grounds over 3000 MOPS: A broadband mobile multimedia modem DSP. In Proc. of ICSPAT. 1998.
 
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T. Dräger and G. Fettweis. Energy Savings with Appropriate Interconnection Networks in Parallel DSP. In Proc. of the DFG-Workshop "Grundlagen und Verfahren verlustarmer Informationsverarbeitung (VIVA)", 2002.
 
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GeLIR. http://ls12-www.cs.uni-dortmund.de/research/gelir/.
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Collaborative Colleagues:
Markus Lorenz: colleagues
Peter Marwedel: colleagues
Thorsten Dräger: colleagues
Gerhard Fettweis: colleagues
Rainer Leupers: colleagues