| Efficient reachability checking using sequential SAT |
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Asia and South Pacific Design Automation Conference
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Proceedings of the 2004 Asia and South Pacific Design Automation Conference
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Yokohama, Japan
SESSION: Formal verification
table of contents
Pages: 418 - 423
Year of Publication: 2004
ISBN:0-7803-8175-0
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IEEE Press
Piscataway, NJ, USA
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Downloads (6 Weeks): 2, Downloads (12 Months): 12, Citation Count: 2
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ABSTRACT
Reachability checking and Pre-image computation are fundamental problems in ATPG and formal verification. Traditional sequential search techniques based on ATPG/SAT, or on OBDDS have diverging strengths and weaknesses. In this paper, we describe how structural analysis and conflict-based learning are combined in order to improve the efficiency of sequential search. We use conflict-based learning and illegal state learning across time-frames. We also address issues in efficiently bounding the search space in a single time-frame and across time-frames. We analyze each of these techniques experimentally and demonstrate the advantages of each technique. We compare performance against a commercial sequential ATPG engine and VIS [13] on a set of standard benchmarks.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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[doi> 10.1145/378239.379017]
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