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Piecewise quadratic waveform matching with successive chord iteration
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Source Asia and South Pacific Design Automation Conference archive
Proceedings of the 2004 Asia and South Pacific Design Automation Conference table of contents
Yokohama, Japan
SESSION: Advanced design and modeling techniques table of contents
Pages: 274 - 279  
Year of Publication: 2004
ISBN:0-7803-8175-0
Authors
Zhong Wang  University of Toronto, Ontario, Canada
Jianwen Zhu  University of Toronto, Ontario, Canada
Sponsors
IEICE : Institute of Electronics, Information and Communication Engineers
: IEEE Circuits and Systems Society
IPSJ : Information Processing Society of Japan
SIGDA: ACM Special Interest Group on Design Automation
Publisher
IEEE Press  Piscataway, NJ, USA
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ABSTRACT

While fast timing analysis methods based on model order reduction have been well established for linear circuits, the timing analysis for non-linear circuits, which are dominant in digital circuits, is usually performed by a SPICE-like, numerical integration-based approach solving differential equations. In this paper, we propose a new technique that leads to the transient so lution of charge/discharge paths with a complexity equivalent to only K DC operating point calculations, where K is the number of transistors along the path. This is accomplished by approximating each nodal voltage as a piecewise quadratic waveform, whose characteristics can be determined by matching the charge/discharge currents calculated by the capacitive components and the resistive components. Successive chord method is then applied to reduce the matrix construction and inversion overhead. Experiments on a wide range of circuits show that an average of 20 times speed-up over HSPICE simulation (transient time only) with 10 picosecond step size can be achieved, while maintaining an average accuracy of 98.03%.


REFERENCES

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