TWIST-TOP: transputers with I-stores test out processor

ABSTRACT

Future parallel computing systems will require high speed communication, efficient synchronization primitives, and low overhead context switches for communicating and synchronizing instruction streams. These issues are developed with respect to I-storage, a global memory that can synchronize requests for data values issued before the data is produced. Methods to implement these I-stores are described for the transputer architecture, with programs and timing results. This description, for both single and multiprocessors, includes a discussion of run-time systems requiring no extra hardware. However, simple hardware extensions are also proposed, which will provide faster implementations. This hardware is expected to be much less expensive than a custom dataflow machine, allowing a larger research community to experiment with dataflow languages and applications.

REFERENCES

• 1: J. L. Gustafson, G. R. Montry, and R. E. Benner. Development of parallel methods for a 1024- processor hypercube. SIAM Journal on ~Tcientific and Statistical Computing, 9(4), July 1988.
• 2: Arvind and R.H. Thomas. I-stvuctnres: An ecient data type for functional languages. Technical Report TM-178, MIT Laboratory for Computer Science, September 1980.
• 3: Arvind and R. A. Iannucci. Two Fundamental Issues in Multiprocessing. Technical Report CSG Memo 226-6, MIT Laboratory for Computer Science, May 1987.
• 4: V. G. Grafe , G. S. Davidson , J. E. Hoch , V. P. Holmes, The Epsilon dataflow processor, Proceedings of the 16th annual international symposium on Computer architecture, p.36-45, April 1989, Jerusalem, Israel
• 5: V.G. Grafe, J.E. Hoch, and G.S. Davidson. eps'88: ~o,tbining ttte be~t features of yon Neumann and dataflow computinq. Technical Report SD-3128, Sandia National Laboratories, January 1989.
• 6: IMS TSO0 Data Sheet. INMOS LIMITED, 1988.
• 7: The Transputer Instruction Set- A Compiler Writers' Guide. INMOS Limited, 1987.
• 8: Jean-Luc Gaudiot , Michel Dubois , Liang-Teh Lee , Nadim G Tohme, The TX16: A highly programmable multi-microprocessor architecture, IEEE Micro, v.6 n.5, p.18-31, Oct. 1986 [doi>10.1109/MM.1986.304709]
• 9: Kenneth R. Traub. sequential implementat(on of lenient programming language~. Technical Report, MIT Laboratory for Computer Science, October 1988.
• 10: Rishiyur S. Nikhil. ID Reference Manual. Technical Report CSG Memo 284, MIT Laboratory for Computer Science, March 1988.
• 11: R. S. Nikhil, Can dataflow subsume von Neumann computing?, Proceedings of the 16th annual international symposium on Computer architecture, p.262-272, April 1989, Jerusalem, Israel
• 12: Arvind , Rishiyur S. Nikhil , Keshav Pingali, I-structures: Data structures for parallel computing, Proceedings of the Workshop on Graph Reduction, p.336-369, September 29-October 01, 1986
• 13: R. A. Iannucci, Toward a dataflow/von Neumann hybrid architecture, Proceedings of the 15th Annual International Symposium on Computer architecture, p.131-140, May 30-June 02, 1988, Honolulu, Hawaii, United States

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS

Additional Classification:
  C. Computer Systems Organization
  C.5 COMPUTER SYSTEM IMPLEMENTATION
      C.5.1 Large and Medium ("Mainframe") Computers
          Subjects: Super (very large) computers

  D. Software
  D.1 PROGRAMMING TECHNIQUES
  D.3 PROGRAMMING LANGUAGES
      D.3.2 Language Classifications
          Subjects: Macro and assembly languages
          Nouns: OCCAM

General Terms:
Design, Experimentation