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Gauss: a simple high performance switch architecture for ATM
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Source Applications, Technologies, Architectures, and Protocols for Computer Communication archive
Proceedings of the ACM symposium on Communications architectures & protocols table of contents
Philadelphia, Pennsylvania, United States
Pages: 126 - 134  
Year of Publication: 1990
ISBN:0-89791-405-8
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Author
R. J. F. de Vries  PTT Research, Netherlands
Sponsor
SIGCOMM: ACM Special Interest Group on Data Communication
Publisher
ACM  New York, NY, USA
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ABSTRACT

Broadband ISDN will use the Asynchronous Transfer Mode (ATM) as its basic switching, multiplexing and transmission technique. ATM is very flexible and promising, nevertheless, it requires high-performance switching hardware. The ATM Switching Element (ASE) proposed in this paper, called the Gauss ASE, can meet ATM requirements. Using traffic observations and a number of well known design principles the Gauss ASE gets a number of favorable properties, for example the Gauss ASE is nonblocking and has minimum delay and variance of delay. The ASE is kept modular so that it can easily grow towards a large single stage switching fabric using only two types of Integrated Circuits.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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