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Power macromodeling of global interconnects considering practical repeater insertion
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Source Great Lakes Symposium on VLSI archive
Proceedings of the 14th ACM Great Lakes symposium on VLSI table of contents
Boston, MA, USA
SESSION: Low Power table of contents
Pages: 244 - 247  
Year of Publication: 2004
ISBN:1-58113-853-9
Authors
Yuantao Peng  North Carolina State University, Raleigh, NC
Xun Liu  North Carolina State University, Raleigh, NC
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

In this paper, we present a simple yet highly effective power macromodeling technique for global interconnects that considers optimal repeater insertion. Specifically,our model estimates the interconnect power dissipation from the interconnect length, the timing budget, the repeater location flexibility, and the signal activity using an analytical function that is derived for a given repeater library and fabrication technology. In experiments with different standard cell libraries, the average error of our technique is less than 2%.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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